19-2808; Rev 0; 4/03
Single LVDS/Anything-to-LVPECL Translator
General Description
The MAX9375 is a fully differential, high-speed, any-
thing-to-LVPECL translator designed for signal rates up
to 2GHz. The MAX9375’s extremely low propagation
delay and high speed make it ideal for various high-
speed network routing and backplane applications.
The MAX9375 accepts any differential input signal within
the supply rails and with minimum amplitude of 100mV.
Inputs are fully compatible with the LVDS, LVPECL,
HSTL, and CML differential signaling standards. Outputs
are LVPECL and have sufficient current to drive 50Ω
transmission lines.
The MAX9375 is available in an 8-pin µMAX package
and operates from a single +3.3V supply over the -40°C
to +85°C temperature range.
Features
o
Guaranteed 2GHz Switching Frequency
o
Accepts LVDS/LVPECL/Anything Inputs
o
421ps (typ) Propagation Delays
o
30ps (max) Pulse Skew
o
2ps
RMS
(max) Random Jitter
o
Minimum 100mV Differential Input to Guarantee
AC Specifications
o
Temperature-Compensated LVPECL Output
o
+3.0V to +3.6V Power-Supply Operating Range
o
>2kV ESD Protection (Human Body Model)
MAX9375
Applications
Backplane Logic Standard Translation
LAN
WAN
DSLAM
DLC
PART
MAX9375EUA
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
8 µMAX
Functional Diagram
TOP VIEW
Pin Configuration
V
CC
IN
LVDS/ANY
LVPECL
IN
SINGLE TRANSLATOR
GND
1
2
3
4
MAX9375
8
V
CC
7
OUT
6
OUT
5
GND
µMAX
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Single LVDS/Anything-to-LVPECL Translator
MAX9375
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +4.1V
Inputs (IN,
IN)
.............................................-0.3V to (V
CC
+ 0.3V)
IN to
IN................................................................................±3.0V
Continuous Output Current .................................................50mA
Surge Output Current .......................................................100mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin µMAX (derate 5.9mW/°C above +70°C) ..........470.6mW
θ
JA
in Still Air............................................................+170°C/W
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (IN,
IN,
OUT,
OUT)
.........................≥ 2kV
Soldering Temperature (10s) ...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, differential input voltage |V
ID
| = 0.1V to 3.0V, input voltage (V
IN
, V
IN
) = 0 to V
CC
, input common-mode voltage
V
CM
= 0.05V to (V
CC
- 0.05V), LVPECL outputs terminated with 50Ω ±1% to V
CC
- 2.0V, T
A
= -40°C to +85°C. Typical values are at
V
CC
= +3.3V, |V
ID
| = 0.2V, input common-mode voltage V
CM
= 1.2V, T
A
= +25°C, unless otherwise noted.) (Notes 1, 2, 3)
PARAMETER
SYMBOL
CONDITIONS
-40°C
MIN
TYP
MAX
MIN
+25°C
TYP
MAX
MIN
+85°C
TYP
MAX
UNITS
DIFFERENTIAL INPUTS (IN,
IN)
Differential Input
Threshold
Input Current
Input Common-
Mode Voltage
V
THD
I
IN
, I
IN
V
CM
V
IN
, V
IN
= V
CC
or 0V
Figure 1
-100
-20
0.05
+100
+20
V
CC
-
0.05
-100
-20
0.05
+100
+20
V
CC
-
0.05
-100
-20
0.05
+100
+20
V
CC
-
0.05
mV
µA
V
LVPECL OUTPUTS (OUT,
OUT)
Single-Ended
Output High
Voltage
Single-Ended
Output Low
Voltage
V
OH
V
CC
- V
CC
- V
CC
-
1.085 1.017 0.880
V
CC
- V
CC
-
1.025 0.983
V
CC
-
0.880
V
CC
-
1.025
V
CC
- V
CC
-
0.966 0.880
V
V
OL
V
CC
- V
CC
- V
CC
-
1.830 1.753 1.620
595
725
V
CC
- V
CC
-
1.810 1.710
595
725
V
CC
-
1.620
V
CC
-
1.810
595
V
CC
- V
CC
-
1.692 1.620
725
V
Differential Output
V
OH
- V
OL
Voltage
POWER SUPPLY
Supply Current
I
CC
All pins open except
V
CC
, GND
mV
10
18
12
18
14
18
mA
2
_______________________________________________________________________________________
Single LVDS/Anything-to-LVPECL Translator
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, differential input voltage |V
ID
| = 0.1V to 1.2V, input frequency
≤
1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (V
IN
, V
IN
) = 0 to V
CC
, input common-mode voltage V
CM
= 0.05V to (V
CC
- 0.05V), outputs termi-
nated with 50Ω ±1% to V
CC
- 2.0V, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, input common-mode volt-
age V
CM
= 1.2V, T
A
= +25°C, unless otherwise noted.) (Note 4)
PARAMETER
Switching Frequency
Propagation Delay Low to High
Propagation Delay High to Low
Pulse Skew |tPLH -tPHL|
Output Low-to-High Transition
Time (20% to 80%)
Output High-to-Low Transition
Time (20% to 80%)
Added Random Jitter
SYMBOL
f
MAX
t
PLH
t
PHL
t
SKEW
t
R
t
F
t
RJ
Figure 2
Figure 2
Figure 2 (Note 5)
Figure 2
Figure 2
f
IN
= 1.34GHz (Note 6)
CONDITIONS
V
OH
- V
OL
≥
250mV
MIN
2.0
250
250
TYP
2.5
421
421
6
116
116
0.7
600
600
30
220
220
2
MAX
UNITS
GHz
ps
ps
ps
ps
ps
ps
(RMS)
MAX9375
Note 1:
Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except V
THD
and V
ID
.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters production tested at T
A
= +25°C and guaranteed by design and characterization over the full operating
temperature range.
Note 4:
Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma.
Note 5:
t
SKEW
is the magnitude difference of differential propagation delays for the same output under the same conditions; t
SKEW
=
|t
PHL
- t
PLH
|.
Note 6:
Device jitter added to the input signal.
Typical Operating Characteristics
(V
CC
= +3.3V, differential input voltage |V
ID
| = 0.2V, V
CM
= 1.2V, input frequency = 500MHz, outputs terminated with 50Ω ±1% to
V
CC
- 2.0V, T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. FREQUENCY
NO LOAD
25
SUPPLY CURRENT (mA)
20
15
10
5
0
0
500
1000
FREQUENCY (MHz)
1500
2000
MAX9375 toc01
OUTPUT AMPLITUDE vs. FREQUENCY
MAX9375 toc02
30
900
800
OUTPUT AMPLITUDE (mV)
700
600
500
400
300
0
500
1000
FREQUENCY (MHz)
1500
2000
_______________________________________________________________________________________
3
Single LVDS/Anything-to-LVPECL Translator
MAX9375
Typical Operating Characteristics (continued)
(V
CC
= +3.3V, differential input voltage |V
ID
| = 0.2V, V
CM
= 1.2V, input frequency = 500MHz, outputs terminated with 50Ω ±1% to
V
CC
- 2.0V, T
A
= +25°C, unless otherwise noted.)
PROPAGATION DELAY
vs. TEMPERATURE
MAX9375 toc03
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9375 toc04
450
440
PROPAGATION DELAY (ps)
430
420
t
PHL
410
400
390
-40
-15
10
35
60
t
PLH
130
125
120
115
110
105
100
t
F
t
R
85
OUTPUT RISE/FALL TIME (ps)
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
Detailed Description
The MAX9375 is a fully differential, high-speed, any-
thing-to-LVPECL translator designed for signal rates up
to 2GHz. The MAX9375’s extremely low propagation
delay and high speed make it ideal for various high-
speed network routing and backplane applications.
The MAX9375 accepts any differential input signals
within the supply rails and with a minimum amplitude of
100mV. Inputs are fully compatible with the LVDS,
LVPECL, HSTL, and CML differential signaling stan-
dards. Outputs are LVPECL and have sufficient current
to drive 50Ω transmission lines.
PIN
NAME
Pin Description
FUNCTION
Positive Supply. Bypass from V
CC
to
GND with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as
close to the device as possible with the
smaller value capacitor closest to the
device.
LVDS/Anything Noninverting Input
LVDS/Anything Inverting Input
Power Supply Ground Connection
Differential LVPECL Inverting Output.
Terminate with 50Ω ±1% to V
CC
- 2V.
Differential LVPECL Noninverting Output.
Terminate with 50Ω ±1% to V
CC
- 2V.
1, 8
V
CC
2
3
4, 5
6
7
IN
IN
GND
OUT
OUT
Inputs
Inputs have a wide common-mode range of 0.05V to
(V
CC
- 0.05V), which accommodates any differential
signals within rails, and requires a minimum of 100mV
to switch the outputs. This allows the MAX9375 inputs
to support virtually any differential signaling standard.
LVPECL Outputs
The MAX9375 outputs are emitter followers that require
external resistive paths to a voltage source (V
T
= V
CC
- 2.0V typ) more negative than worst-case V
OL
for proper
static and dynamic operation. When properly terminat-
ed, the outputs generate steady-state voltage levels,
V
OL
or V
OH
with fast transition edges between state
levels. Output current always flows into the termination
during proper operation.
4
_______________________________________________________________________________________
Single LVDS/Anything-to-LVPECL Translator
Applications Information
Output Termination
Terminate the outputs with 50Ω to (V
CC
- 2V) or use
equivalent Thevenin terminations. Terminate OUT and
OUT
with identical termination on each for low-output
distortion. When a single-ended signal is taken from the
differential output, terminate both OUT and
OUT.
Ensure
that output currents do not exceed the current limits as
specified in the
Absolute Maximum Ratings.
Under all
operating conditions, the device’s total thermal limits
should be observed.
V
CC
V
ID
MAX9375
V
CM
(MAX) = V
CC
- 0.05V
V
ID
V
CM
(MIN) = 0.05V
GND
Supply Bypassing
Bypass V
CC
to ground with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors. Place the
capacitors as close to the device as possible with the
0.01µF capacitor closest to the device pins.
Figure 1. Input Definitions
Traces
Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ω characteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
IN
V
ID
IN
t
PHL
OUT
V
OH -
V
OL
OUT
80%
DIFFERENTIAL OUTPUT
WAVEFORM
V
OH -
V
OL
20%
OUT - OUT
t
R
t
F
20%
80%
0V DIFFERENTIAL
t
PLH
V
OH
V
OL
0V DIFFERENTIAL
V
OH -
V
OL
Figure 2. Differential Input-to-Output Propagation Delay Timing
Diagram
Chip Information
TRANSISTOR COUNT: 614
PROCESS: Bipolar
_______________________________________________________________________________________
5
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