MCP3903
Six Channel Delta Sigma A/D Converter
Features
• Six Synchronous Sampling 16/24-bit Resolution
Delta-Sigma A/D Converters with Proprietary
Multi-Bit Architecture
• 91 dB SINAD, -100 dBc Total Harmonic Distortion
(THD) (up to 35
th
harmonic), 102 dB Spurious-free
Dynamic Range (SFDR) for Each Channel
• Programmable Data Rate up to 64 ksps
• Ultra Low-Power Shutdown Mode with <2
μA
• -115 dB Crosstalk Between any Two Channels
• Low Drift Internal Voltage Reference: 5 ppm/°C
• Differential Voltage Reference Input Pins
• High Gain PGA on Each Channel (up to 32 V/V)
• Phase Delay Compensation Between Each Pair
of Channels with 1
μs
Time Resolution
• High-Speed Addressable 10 MHz SPI Interface
with Mode 0,0 and 1,1 Compatibility
• Independent Analog and Digital Power Supplies
4.5V - 5.5V AV
DD
, 2.7V - 3.6V DV
DD
• Available in Small 28-lead SSOP Package
• Extended Temperature Range: -40°C to +125°C
Description
The MCP3903 is a six-channel Analog Front End (AFE)
containing three pairs made out of two synchronous
sampling Delta-Sigma Analog-to-Digital Converters
(ADC) with PGA, a phase delay compensation block,
internal voltage reference, and high-speed 10 MHz SPI
compatible serial interface. The converters contain a
proprietary dithering algorithm for reduced idle tones
and improved THD.
The internal register map contains 24-bit wide ADC
data words, a modulator output register as well as six
24-bit writable control registers to program gain,
over-sampling ratio, phase, resolution, dithering,
shut-down, reset and several communication features.
The communication is largely simplified with various
Continuous Read modes that can be accessed by the
Direct Memory Access (DMA) of an MCU and with
separate Data Ready pins that can directly be
connected to the Interrupt Request (IRQ) input of an
MCU. The MCP3903 is capable of interfacing to a large
variety of voltage and current sensors including shunts,
current transformers, Rogowski coils, and Hall-effect
sensors.
Applications
• Energy Metering and Power Measurement
• Portable Instrumentation
• Medical and Power Monitoring
Package Type
28-Lead SSOP
AV
DD
CH0+
CH0-
CH1-
CH1+
CH2+
CH2-
CH3-
CH3+
CH4+
CH4-
CH5-
CH5+
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DV
DD
RESET
SDI
SDO
SCK
CS
OSC2
OSC1
DRC
DRB
DRA
DGND
AGND
REFIN-
REFIN/OUT+ 14
©
2011 Microchip Technology Inc.
DS25048B-page 1
MCP3903
Functional Block Diagram
REFIN/OUT+
AV
DD
Voltage
VREFEXT
Reference
+
V
REF
-
V
REF
- V
REF
+ ANALOG DIGITAL
SINC
3
+
-
PGA
Δ
-Σ
Modulator
Φ
CH1+
CH1-
+
-
PGA
Δ
-Σ
Modulator
SINC
3
DV
DD
AMCLK
DMCLK/DRCLK
Clock
Generation
Xtal Oscillator
MCLK
OSC1
OSC2
REFIN -
DMCLK
DATA_CH0<23:0>
OSR<1:0>
PRE<1:0>
CH0+
CH0-
Phase
Shifter
PHASEA <7:0>
DRA
DATA_CH1<23:0>
DUAL DS ADC
CH2+
CH2-
SINC
3
+
-
PGA
Δ
-Σ
Modulator
Φ
DATA_CH2<23:0>
Phase
Shifter
PHASEB <7:0>
Digital SPI
Interface
DRB
CH3+
CH3-
+
-
PGA
Δ
-Σ
Modulator
SINC
3
DATA_CH3<23:0>
DUAL DS ADC
CH4+
CH4-
SINC
3
+
-
PGA
Δ
-Σ
Modulator
Φ
DATA_CH4<23:0>
Phase
Shifter
PHASEC <7:0>
DRC
CH5+
CH5-
+
-
PGA
Δ
-Σ
Modulator
SINC
3
DATA_CH5<23:0>
SDO
RESET
SDI
SCK
CS
DUAL DS ADC
POR
AV
DD
Monitoring
POR
AGND
DGND
DS25048B-page 2
©
2011 Microchip Technology Inc.
MCP3903
1.0
ELECTRICAL
CHARACTERISTICS
1.1
RELIABILITY TARGETS
ABSOLUTE MAXIMUM RATINGS †
V
DD
................................................................................... 7.0V
Digital inputs and outputs w.r.t. A
GND
........-0.6V to V
DD
+0.6V
Analog input w.r.t. A
GND
..................................... ....-6V to +6V
V
REF
input w.r.t. A
GND
................................-0.6V to V
DD
+0.6V
Storage temperature ..................................... -65°C to +150°C
Ambient temp. with power applied................ -65°C to +125°C
Soldering temperature of leads (10 seconds)............. +300°C
ESD on the analog inputs (HBM,MM)................. 5.0 kV, 500V
ESD on all other pins (HBM,MM)........................ 5.0 kV, 500V
The Reliability Targets section includes the absolute
maximum ratings for the device, defining the values
that will cause no long term damage regardless of
duration.
These tables also represent the testing requirements
per the Max. and Min. columns.
TABLE 1-1:
ANALOG SPECIFICATIONS TARGET TABLE
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AV
DD
= 4.5 to 5.5V, DV
DD
= 2.7 to
3.6V, Internal V
REF
, MCLK = 4 MHz;PRESCALE = 1; OSR = 64; f
S
= 1 MHz; f
D
= 15.625 ksps; T
A
= -40°C to +125°C,
GAIN = 1, V
IN
= 1V
PP
= 353mV
RMS
@ 50/60 Hz.
Param.
Num.
Symbol
Characteristic
Min.
Typ.
Max.
Units
Test Conditions
Internal Voltage Reference
A001
A002
A003
V
REF
TC
REF
Voltage
Tempco
-2%
—
2.35
5
7
+2%
—
—
V
kΩ
VREFEXT = 0
AV
DD
=5V,
VREFEXT = 0
ppm/°C VREFEXT = 0
ZOUT
REF
Output Impedance
Voltage Reference Input
A004
A005
A006
A007
V
REF
V
REF+
V
REF-
Input Capacitance
Differential Input Voltage
Range (V
REF+
- V
REF-
)
Absolute Voltage on REFIN+
pin
Absolute Voltage on REFIN-
pin
Resolution (No Missing
Codes)
f
S
f
D
Sampling Frequency
Output Data Rate
—
2.2
1.9
-0.3
—
—
—
—
10
2.6
2.9
+0.3
pF
V
V
V
V
REF
= (V
REF+
- V
REF-
),
VREFEXT = 1
VREFEXT = 1
V
REF-
should be connected
to AGND when VREFEXT=0
OSR = 256 (see
Table 5-2)
f
S
= DMCLK = MCLK / (4 x
PRESCALE)
f
D
= DRCLK= DMCLK / OSR
= MCLK / (4 x PRESCALE x
OSR)
ADC Performance
A008
A009
A010
24
See
Table 4-2
See
Table 4-2
bits
kHz
ksps
Note 1:
2:
3:
4:
5:
6:
7:
8:
This specification implies that the ADC output is valid over this entire differential range, i.e. there is no distortion or
instability across this input range. Dynamic Performance is specified at -0.5 dB below the maximum signal range,
V
IN
= -0.5 dBFS @ 50/60 Hz = 333 mV
RMS
, V
REF
= 2.4V.
See terminology section for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> =
000000,
RESET<5:0> =
000000;
VREFEXT =
0,
CLKEXT =
0.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> =
111111,
VREFEXT =
1,
CLKEXT =
1.
Applies to all gains. Offset error is dependant on PGA gain setting.
Outside of this range, ADC accuracy is not specified. An extended input range of +/- 6V can be applied continuously to
the part with no risk for damage.
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with BOOST bits
off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz. AMCLK = MCLK/PRESCALE. When using a
crystal, CLKEXT bit should be equal to ‘0’.
©
2011 Microchip Technology Inc.
DS25048B-page 3
MCP3903
TABLE 1-1:
ANALOG SPECIFICATIONS TARGET TABLE
(CONTINUED)
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AV
DD
= 4.5 to 5.5V, DV
DD
= 2.7 to
3.6V, Internal V
REF
, MCLK = 4 MHz;PRESCALE = 1; OSR = 64; f
S
= 1 MHz; f
D
= 15.625 ksps; T
A
= -40°C to +125°C,
GAIN = 1, V
IN
= 1V
PP
= 353mV
RMS
@ 50/60 Hz.
Param.
Num.
A011
Symbol
CHn+-
Characteristic
Analog Input Absolute
Voltage
Analog Input Leakage
Current
Differential Input Voltage
Range
Offset Error
Offset Error Drift
GE
INL
Z
IN
SINAD
THD
Gain Error
Gain Error Drift
Integral Non-Linearity
Input Impedance
Signal-to-Noise and
Distortion Ratio
Total Harmonic Distortion
350
89
80
-3
—
2
15
—
91
81.5
-100
-90
A022
A023
SNR
SFDR
Signal To Noise Ratio
Spurious Free Dynamic
Range
Crosstalk (50 / 60 Hz)
—
—
—
—
90
80
91.5
81.5
102
91
A024
A025
A026
A027
CTALK
-115
-68
-68
-75
—
—
—
—
-97
-87
—
—
-3
1
3
—
Min.
-1
Typ.
Max.
+1
Units
V
Test Conditions
All analog input channels,
measured to AGND
(Note 7)
(Note 4)
(Note 1)
(Note 6)(Note 2)
From -40°C to 125°C
All Gains
GAIN = 1, DITHER = ON
Proportional to 1/AMCLK
T = 25°C
OSR = 256, DITHER = ON;
(Note 2)(Note 3)
T = 25°C
OSR = 256, DITHER = ON;
(Note 2) (Note 3)
OSR = 256, DITHER = ON;
(Note 2)(Note 3)
AV
DD
= 5V + 1Vpp @ 50 Hz
AV
DD
= 4.5 to 5.5V, DV
DD
=
3.3V
V
CM
varies from -1V to +1V;
(Note 2)
A012
A013
A014
A015
A016
A017
A018
A019
A020
A021
A
IN
(CH
n+
-
CH
n-
)
V
OS
1
500 /
GAIN
3
nA
mV
P
mV
μV/C
%
ppm
kΩ
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
ppm/°C From -40°C to 125°C
AC PSRR AC Power Supply Rejection
DC PSRR DC Power Supply Rejection
CMRR
DC Common Mode Rejection
Ratio
Oscillator Input
Note 1:
This specification implies that the ADC output is valid over this entire differential range, i.e. there is no distortion or
instability across this input range. Dynamic Performance is specified at -0.5 dB below the maximum signal range,
V
IN
= -0.5 dBFS @ 50/60 Hz = 333 mV
RMS
, V
REF
= 2.4V.
See terminology section for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> =
000000,
RESET<5:0> =
000000;
VREFEXT =
0,
CLKEXT =
0.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> =
111111,
VREFEXT =
1,
CLKEXT =
1.
Applies to all gains. Offset error is dependant on PGA gain setting.
Outside of this range, ADC accuracy is not specified. An extended input range of +/- 6V can be applied continuously to
the part with no risk for damage.
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with BOOST bits
off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz. AMCLK = MCLK/PRESCALE. When using a
crystal, CLKEXT bit should be equal to ‘0’.
2:
3:
4:
5:
6:
7:
8:
DS25048B-page 4
©
2011 Microchip Technology Inc.
MCP3903
TABLE 1-1:
ANALOG SPECIFICATIONS TARGET TABLE
(CONTINUED)
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AV
DD
= 4.5 to 5.5V, DV
DD
= 2.7 to
3.6V, Internal V
REF
, MCLK = 4 MHz;PRESCALE = 1; OSR = 64; f
S
= 1 MHz; f
D
= 15.625 ksps; T
A
= -40°C to +125°C,
GAIN = 1, V
IN
= 1V
PP
= 353mV
RMS
@ 50/60 Hz.
Param.
Num.
A028
Symbol
MCLK
Characteristic
Master Clock Frequency
Range
Operating Voltage, Analog
Operating Voltage, Digital
Operating Current, Analog
(Note 4)
Min.
1
Typ.
—
Max.
16.384
Units
MHz
Test Conditions
(Note 8)
Power Specifications
P001
P002
P003
AV
DD
DV
DD
AI
DD
4.5
2.7
—
—
7.1
12.3
P004
DI
DD
Operating Current, Digital
—
—
P005
I
DDS,A
Shutdown Current, Analog
—
—
P006
I
DDS,D
Shutdown Current, Digital
—
—
Note 1:
5.5
3.6
9
16.8
1.7
3.4
1
3
1
5
V
V
mA
mA
mA
mA
μA
μA
μA
μA
BOOST bits low on all chan-
nels
BOOST bits high on all
channels
DV
DD
= 3.6V, MCLK =
4 MHz
DV
DD
= 3.6V, MCLK =
8.192 MHz
-40°C to 85°C, AV
DD
pin
only,
(Note 5)
-40°C to 125°C, AV
DD
pin
only,
(Note 5)
-40°C to 85°C, DV
DD
pin
only,
(Note 5)
-40°C to 125°C, DV
DD
pin
only,
(Note 5)
1.2
2.4
—
—
—
—
2:
3:
4:
5:
6:
7:
8:
This specification implies that the ADC output is valid over this entire differential range, i.e. there is no distortion or
instability across this input range. Dynamic Performance is specified at -0.5 dB below the maximum signal range,
V
IN
= -0.5 dBFS @ 50/60 Hz = 333 mV
RMS
, V
REF
= 2.4V.
See terminology section for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> =
000000,
RESET<5:0> =
000000;
VREFEXT =
0,
CLKEXT =
0.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> =
111111,
VREFEXT =
1,
CLKEXT =
1.
Applies to all gains. Offset error is dependant on PGA gain setting.
Outside of this range, ADC accuracy is not specified. An extended input range of +/- 6V can be applied continuously to
the part with no risk for damage.
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with BOOST bits
off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz. AMCLK = MCLK/PRESCALE. When using a
crystal, CLKEXT bit should be equal to ‘0’.
©
2011 Microchip Technology Inc.
DS25048B-page 5
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