PCA9513A; PCA9514A
Hot swappable I
2
C-bus and SMBus bus buffer
Rev. 04 — 18 August 2009
Product data sheet
1. General description
The PCA9513A and PCA9514A are hot swappable I
2
C-bus and SMBus buffers that allow
I/O card insertion into a live backplane without corrupting the data and clock buses.
Control circuitry prevents the backplane from being connected to the card until a stop
command or bus idle occurs on the backplane without bus contention on the card. When
the connection is made, the PCA9513A and PCA9514A provides bidirectional buffering,
keeping the backplane and card capacitances isolated.
Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still
meeting rise time requirements. The PCA9513A and PCA9514A incorporates a digital
ENABLE input pin, which enables the device when asserted HIGH and forces the device
into a Low current mode when asserted LOW, and an open-drain READY output pin,
which indicates that the backplane and card sides are connected together (HIGH) or not
(LOW).
The PCA9513A supplies a 92
µA
current source to SCLIN and SDAIN pins in lieu of using
pull-up resistors which is ideal for multidrop bus applications. Including the current source
in the device provides for a consistent RC time constant as cards are removed and
inserted into the backplane. The current source is high-impedance whenever the pin
voltage is greater than the part V
CC
.
The PCA9513A and PCA9514A rise time accelerator threshold is 0.8 V to provide better
noise margin over the PCA9511A which is set to 0.6 V.
Remark:
The dynamic offset design of the PCA9510A/11A/12A/13A/14A I/O drivers allow
them to be connected to another PCA9510A/11A/12A/13A/14A device in series or in
parallel and to the A side of the PCA9517. The PCA9510A/11A/12A/13A/14A
cannot
connect to the static offset I/Os used on the PCA9515/15A/16/16A/18 or PCA9517 B side
or P82B96 Sx/y side.
2. Features
I
Bidirectional buffer for SDA and SCL lines increases fan-out and prevents SDA and
SCL corruption during live board insertion and removal from multipoint backplane
systems
I
Compatible with I
2
C-bus Standard mode, I
2
C-bus Fast mode, and SMBus standards
I
Built-in
∆V/∆t
rise time accelerators on all SDA and SCL lines (0.8 V threshold)
requires the bus pull-up voltage and supply voltage (V
CC
) to be the same
I
Rise time accelerator threshold moved from 0.6 V to 0.8 V for improved noise margin
I
Active HIGH ENABLE input
I
Active HIGH READY open-drain output
I
High-impedance SDAn and SCLn pins for V
CC
= 0 V
NXP Semiconductors
PCA9513A; PCA9514A
Hot swappable I
2
C-bus and SMBus bus buffer
I
92
µA
current source on SCLIN and SDAIN for PICMG backplane applications
(PCA9513A only)
I
Supports clock stretching and multiple master arbitration and synchronization
I
Operating power supply voltage range: 2.7 V to 5.5 V
I
0 Hz to 400 kHz clock frequency
I
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
I
Packages offered: SO8, TSSOP8 (MSOP8)
3. Applications
I
cPCI, VME, AdvancedTCA cards and other multipoint backplane cards that are
required to be inserted or removed from an operating system
4. Feature selection
Table 1.
Feature
Idle detect
High-impedance SDAn, SCLn pins for V
CC
= 0 V
Rise time accelerator circuitry on SDAn and SCLn pins
Rise time accelerator circuitry hardware disable pin for
lightly loaded systems
Rise time accelerator threshold 0.8 V versus 0.6 V
improves noise margin
READY open-drain output
Feature selection chart
PCA9510A PCA9511A PCA9512A PCA9513A PCA9514A
yes
yes
-
-
-
yes
yes
yes
yes
-
-
yes
-
yes
-
yes
yes
yes
yes
-
-
yes
yes
-
yes
yes
yes
-
yes
yes
-
-
yes
yes
yes
yes
-
yes
yes
-
-
-
Two V
CC
pins to support 5 V to 3.3 V level translation with -
improved noise margins
1 V precharge on all SDAn and SCLn pins
92
µA
current source on SCLIN and SDAIN for PICMG
applications
in only
-
5. Ordering information
Table 2.
Ordering information
T
amb
=
−
40
°
C to +85
°
C
Type number
PCA9513AD
PCA9514AD
PCA9513ADP
PCA9514ADP
[1]
Topside
mark
PA9513A
PA9514A
9513A
9514A
Package
Name
SO8
SO8
TSSOP8
[1]
TSSOP8
[1]
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic small outline package; 8 leads; body width 3.9 mm
Version
SOT96-1
SOT96-1
plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1
plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1
Also known as MSOP8.
PCA9513A_PCA9514A_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 18 August 2009
2 of 26
NXP Semiconductors
PCA9513A; PCA9514A
Hot swappable I
2
C-bus and SMBus bus buffer
Standard packing quantities and other packaging data are available at
www.standardics.nxp.com/packaging/.
6. Block diagram
PCA9513A
92
µA
2 mA
2 mA
OVER-
VOLTAGE
CUT-OFF
SDAIN
SLEW RATE
DETECTOR
BACKPLANE-TO-CARD
CONNECTION
CONNECT
SLEW RATE
DETECTOR
V
CC
SDAOUT
CONNECT
92
µA
2 mA
2 mA
OVER-
VOLTAGE
CUT-OFF
SCLIN
SLEW RATE
DETECTOR
BACKPLANE-TO-CARD
CONNECTION
CONNECT
SLEW RATE
DETECTOR
SCLOUT
CONNECT
0.55V
CC
/
0.45V
CC
STOP BIT AND
BUS IDLE
0.5
µA
0.55V
CC
/
0.45V
CC
20 pF
CONNECT
100
µs
DELAY
UVLO
READY
RD
S
QB
GND
UVLO
ENABLE
0.5 pF
CONNECT
002aab680
Fig 1.
Block diagram of PCA9513A
PCA9513A_PCA9514A_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 18 August 2009
3 of 26
NXP Semiconductors
PCA9513A; PCA9514A
Hot swappable I
2
C-bus and SMBus bus buffer
PCA9514A
2 mA
2 mA
SLEW RATE
DETECTOR
SDAIN
CONNECT
BACKPLANE-TO-CARD
CONNECTION
SLEW RATE
DETECTOR
V
CC
SDAOUT
CONNECT
2 mA
2 mA
SLEW RATE
DETECTOR
SCLIN
CONNECT
BACKPLANE-TO-CARD
CONNECTION
SLEW RATE
DETECTOR
SCLOUT
CONNECT
0.55V
CC
/
0.45V
CC
STOP BIT AND
BUS IDLE
0.5
µA
0.55V
CC
/
0.45V
CC
20 pF
CONNECT
100
µs
DELAY
UVLO
READY
RD
S
QB
GND
UVLO
ENABLE
0.5 pF
CONNECT
002aab681
Fig 2.
Block diagram of PCA9514A
PCA9513A_PCA9514A_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 18 August 2009
4 of 26
NXP Semiconductors
PCA9513A; PCA9514A
Hot swappable I
2
C-bus and SMBus bus buffer
7. Pinning information
7.1 Pinning
ENABLE
SCLOUT
SCLIN
GND
1
2
3
4
002aab676
8
V
CC
SDAOUT
SDAIN
READY
ENABLE
SCLOUT
SCLIN
GND
1
2
3
4
002aab677
8
V
CC
SDAOUT
SDAIN
READY
PCA9513AD
PCA9514AD
7
6
5
PCA9513ADP
PCA9514ADP
7
6
5
Fig 3.
Pin configuration for SO8
Fig 4.
Pin configuration for TSSOP8
(MSOP8)
7.2 Pin description
Table 3.
Symbol
ENABLE
Pin description
Pin
1
Description
Chip enable. Grounding this input puts the part in a Low current (< 1
µA)
mode. It also disables the rise time accelerators, isolates SDAIN from
SDAOUT and isolates SCLIN from SCLOUT.
serial clock output to and from the SCL bus on the card
serial clock input to and from the SCL bus on the backplane
Ground. Connect this pin to a ground plane for best results.
open-drain output which pulls LOW when SDAIN and SCLIN are
disconnected from SDAOUT and SCLOUT, and goes HIGH when the two
sides are connected
serial data input to and from the SDA bus on the backplane
serial data output to and from the SDA bus on the card
power supply
SCLOUT
SCLIN
GND
READY
2
3
4
5
SDAIN
SDAOUT
V
CC
6
7
8
8. Functional description
Refer to
Figure 1 “Block diagram of PCA9513A”
and
Figure 2 “Block diagram of
PCA9514A”.
8.1 Start-up
An undervoltage and initialization circuit holds the parts in a disconnected state which
presents high-impedance to all SDAn and SCLn pins during power-up. A LOW on the
ENABLE pin also forces the parts into the low current disconnected state when the I
CC
is
essentially zero. As the power supply is brought up and the ENABLE is HIGH or the part is
powered and the ENABLE is taken from LOW to HIGH it enters an initialization state
where the internal references are stabilized and the 92
µA
input pull-ups (on the
PCA9513A) is enabled. At the end of the initialization state the ‘Stop Bit And Bus Idle’
detect circuit is enabled. With the ENABLE pin HIGH long enough to complete the
initialization state (t
en
) and remaining HIGH when all the SDAn and SCLn pins have been
PCA9513A_PCA9514A_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 18 August 2009
5 of 26
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