Addendum to MC68HC908QC16, rev.
5
This addendum introduces a change to this data sheet.
Chapter 18 Development Support, Section 18.3.2 Security
A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
NOTE
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors.
Changes to:
Chapter 18 Development Support, Section 18.3.2 Security
A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
NOTE
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors. An improved
security function denies monitor mode entry if five or more of the eight
security bytes are $00 (zero bytes).
MC68HC908QC16 Data Sheet, Addendum 5/2012
Freescale Semiconductor
1
MC68HC908QC16
MC68HC908QC8
MC68HC908QC4
Data Sheet
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This product incorporates SuperFlash® technology licensed from SST.
© Freescale Semiconductor, Inc., 2007, 2008. All rights reserved.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
Freescale Semiconductor
3
Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
Date
April, 2006
Revision
Level
1.0
Initial release
19.5 5-V DC Electrical Characteristics — Updated values
19.8 3.3-V DC Electrical Characteristics — Updated values
May, 2006
1.1
19.11 Oscillator Characteristics — Updated values
Figure 19-9. Typical 5-Volt Run Current versus Bus Frequency (25 C) and
Figure 19-10. Typical 3.3-Volt Run Current versus Bus Frequency (25 C) —
added
1.7 Unused Pin Termination — Added new section
11.2 Unused Pin Termination — Replaced note with new section
19.5 5-V DC Electrical Characteristics — New values for:
DC injection current
Low-voltage inhibit reset, trip rising voltage
October, 2006
2.0
19.8 3.3-V DC Electrical Characteristics — New values for:
DC injection current
Low-voltage inhibit reset, trip rising voltage
19.12 Supply Current Characteristics — New values for stop mode supply
currents at –40 to 125°C
20.3 Package Dimensions — Updated package dimension drawing for the
28-lead TSSOP.
Table 1-2. Pin Functions — Added note
Figure 2-2. Control, Status, and Data Registers — Corrected Port C Data
Register bit PTC3
Chapter 3 Analog-to-Digital Converter (ADC10) Module — Renamed ADCSC
register to ADSCR to be consistent with development tools
Chapter 4 Configuration Registers (CONFIG1 and CONFIG2) — Changed
CGMXCLK to BUSCLKX4
11.3 Port A — Added information to first paragraph of note
April, 2007
3.0
11.3.1 Port A Data Register — Corrected bit designations for the first entry
under Figure 11-1. Port A Data Register (PTA).
11.5 Port C — Added note and corrected address location designation in last
paragraph
Chapter 13 Enhanced Serial Communications Interface (ESCI) Module —
Changed SCIBDSRC to ESCIBDSRC and CGMXCLK to BUSCLKX4
13.9.3 Bit Time Measurement — Corrected first sentence of listing number 1
Figure 18-18. Monitor Mode Entry Timing — Changed CGMXCLK to
BUSCLKX4
October, 2007
April, 2008
4.0
5.0
In 19.12 Supply Current Characteristics, updated stop I
DD
values
In
19.12 Supply Current Characteristics,
reverted to Rev. 3 stop I
DD
values
Description
Page
Number(s)
N/A
237
240
243
247
24
107
237
240
246
261
22
27
45
60
107
108
112
113
123
150
234
246
246
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
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Freescale Semiconductor
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