Freescale Semiconductor
Data Sheet:
Technical Data
Document Number: MC9S08SF4
Rev. 4, 9/2011
MC9S08SF4
MC9S08SF4 Series
Features
• 8-Bit S08 Central Processor Unit (CPU)
– Up to 40 MHz CPU at 2.7 V to 5.5 V across temperature
range of –40
C
to 125
C
– HC08 instruction set with added BGND instruction
– Support for up to 32 interrupt/reset sources
• On-Chip Memory
– 4 KB flash read/program/erase over full operating
voltage and temperature
– 128-byte random-access memory (RAM)
– Security circuitry to prevent unauthorized access to
RAM and flash contents
• Power-Saving Modes
– Two low power stop modes; reduced power wait mode
– Allows clocks to remain enabled to specific peripherals
in stop3 mode
• Clock Source Options
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by an internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 1% deviation over 0–70
C
and voltage, 2%
deviation over –40–85
C
and voltage, or 3% deviation
over –40–125
C
and voltage; supporting bus
frequencies up to 20 MHz
• System Protection
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal clock
source or bus clock
– Low-voltage detection with reset or interrupt; selectable
trip points
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash block protection
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging (plus two more breakpoints)
– On-chip in-circuit emulator (ICE) debug module
containing two comparators and nine trigger modes
20-Pin TSSOP
Case 948E
16-Pin TSSOP
Case 948F
• Peripherals
–
IPC
— Prioritize interrupt sources besides inherent
CPU interrupt table; support up to 32 interrupt sources
and up to 4-level preemptive interrupt nesting
–
ADC —
8-channel, 10-bit resolution; 2.5
s
conversion
time; automatic compare function; temperature sensor;
internal bandgap reference channel; operation in stop;
fully functional from 2.7 V to 5.5 V
–
TPM
— One 40 MHz 6-channel and one 40 MHz
1-channel timer/pulse-width modulators (TPM)
modules; selectable input capture, output compare, or
buffered edge- or center-aligned PWM on each channel
–
MTIM16 —
Two 16-bit modulo timers
–
PWT
— Two 16-bit pulse width timers (PWT);
selectable driving clock, positive/negative/period
capture
–
PRACMP
— Two programmable reference analog
comparators with eight optional inputs for both positive
and negative inputs; 32-level internal reference voltages
scaled by selectable reference inputs
–
IIC
— Inter-integrated circuit bus module capable of
operation up to 100 kbps with maximum bus loading;
multi-master operation; programmable slave address;
interrupt-driven byte-by-byte data transfer; broadcast
mode; 10-bit addressing
–
KBI
— 4-pin keyboard interrupt module with software
selectable polarity on edge or edge/level modes
–
FDS
— Shut down output pin upon fault detection; the
fault sources can be optional enabled separately; the
output pin can be configured as output 1,0 and high
impedance when a fault occurs based on module
configuration
• Input/Output
– 18 GPIOs including one input-only pin and one
output-only pin
– Hysteresis and configurable pullup device on all input
pins; schmitt trigger on PWT input pins; configurable
slew rate and drive strength on all output pins.
• Package Options
– 16-pin TSSOP
– 20-pin TSSOP
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009-2011. All rights reserved.
Table of Contents
1
2
3
MCU Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . 5
3.3 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 5
3.4 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . 6
3.5 ESD Protection and Latch-Up Immunity . . . . . . . 7
3.6 DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 8
3.7 Supply Current Characteristics . . . . . . . . . . . . . 14
3.8 ICS Characteristics . . . . . . . . . . . . . . . . . . . . . . 16
3.9 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . 17
3.9.1 Control Timing . . . . . . . . . . . . . . . . . . . . . 18
3.9.2 Timer/PWM (TPM) Module Timing . . . . . 19
3.10 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . 20
4
5
3.11 PRACMP Characteristics . . . . . . . . . . . . . . . . . .21
3.12 Flash Specifications . . . . . . . . . . . . . . . . . . . . . .22
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . .23
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . .23
5.1 Mechanical Drawings . . . . . . . . . . . . . . . . . . . . .23
Revision History
The following revision history table summarizes changes contained in this document.
Revision
2
3
4
Date
4/30/2009
8/18/2009
9/19/2011
Initial public release.
Polished.
Updated V
AIN
in the
Table 12.
Description of Changes
Related Documentation
Reference Manual
(MC9S08SF4RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module information.
MC9S08SF4 Series MCU Data Sheet, Rev. 4
2
Freescale Semiconductor
1
MCU Block Diagram
DEBUG MODULE
(DBG)
INTERRUPT PRIORITY
CONTROLLER (IPC)
16-BIT MODULO TIMER
(MTIM16-1)
PTA1/KBI1/RESET
16-BIT MODULO TIMER
HCS08 CORE
(MTIM16-2)
TCLK
PTA2/KBI2/TPM1C0/FDSOUT0
TCLK
PTA0/KBI0/TCLK/IRQ
The block diagram,
Figure 1,
shows the structure of the MC9S08SF4 MCU.
PORT A
PTA3/KBI3/TPM1C1/FDSOUT1
PTA4/TPM1C2/FDSOUT2
PTA5/TPM1C3/FDSOUT3
PTA6/TPM1C4/FDSOUT4
PTA7/TPM1C5/FDSOUT5
4-PIN KEYBOARD
CPU
BDC
INTERRUPT
(
KBI)
6-CH TIMER/PWM
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
WAKEUP
IRQ
LVD
1-CH TIMER/PWM
USER Flash
4096 BYTES
USER RAM
128 BYTES
MODULE (TPM2)
PULSE WIDTH TIMER
(PWT1)
PULSE WIDTH TIMER
(PWT2)
ANALOG COMPARATOR
(PRACMP1)
ANALOG COMPARATOR
(PRACMP2)
V
DD
V
SS
VOLTAGE REGULATOR
RESET
IRQ
FAULT DETECTION
& SHUTDOWN (FDS)
MODULE (TPM1)
KBI[3:0]
TPM1C[5:0]
TCLK
FDSOUT[6:0]
PTB0/TPM2C0/FDSOUT6
PTB1/PWTI1/ADC0
PTB2/PWTI2/ADC1
TPM2C0
TCLK
PORT B
PWTI1
TCLK
PWTI2
TCLK
ACMP3
ACMP2
ACMP1
ACMP0
ACMP3
ACMP2
ACMP1
ACMP0
PTB3/ACMP3/ADC2
PTB4/ACMP2/ADC3
PTB5/ACMP1/ADC4
PTB6/ACMP0/ADC5
PTB7/BKGD/MS
40 MHz INTERNAL CLOCK
SOURCE (ICS)
PORT C
8-CH 10-BIT
ANALOG-TO-DIGITAL
CONVERTER(ADC)
INTER-INTERGRATED
CIRCUIT (IIC)
ADP[5:0]
ADP[6:7]
PTC0/ADC6/SCL
PTC1/ADC7/SDA
SCL
SDA
=
Not available in the 16-pin TSSOP package
Figure 1. MC9S08SF4 Series Block Diagram
2
Pin Assignments
This section shows the pin assignments for the MC9S08SF4 series devices.
MC9S08SF4 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor
3
V
DD
PTA0/KBI0/TCLK/IRQ
PTA1/KBI1/RESET
PTA2/KBI2/TPM1C0/FDSOUT0
PTA3/KBI3/TPM1C1/FDSOUT1
PTA4/TPM1C2/FDSOUT2
PTA5/TPM1C3/FDSOUT3
PTA6/TPM1C4/FDSOUT4
PTA7/TPM1C5/FDSOUT5
PTB0/TPM2C0/FDSOUT6
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
SS
PTC1/SDA/ADC7
PTC0/SCL/ADC6
PTB7/BKGD/MS
PTB6/ACMP0/ADC5
PTB5/ACMP1/ADC4
PTB4/ACMP2/ADC3
PTB3/ACMP3/ADC2
PTB2/PWTI2/ADC1
PTB1/PWTI1/ADC0
Figure 2. MC9S08SF4 in 20-Pin TSSOP Package
V
DD
PTA0/KBI0/TCLK/IRQ
PTA1/KBI1/RESET
PTA2/KBI2/TPM1C0/FDSOUT0
PTA3/KBI3/TPM1C1/FDSOUT1
PTA4/TPM1C2/FDSOUT2
PTA5/TPM1C3/FDSOUT3
PTB0/TPM2C0/FDSOUT6
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
SS
PTB7/BKGD/MS
PTB6/ACMP0/ADC5
PTB5/ACMP1/ADC4
PTB4/ACMP2/ADC3
PTB3/ACMP3/ADC2
PTB2/PWTI2/ADC1
PTB1/PWTI1/ADC0
Figure 3. MC9S08SF4 in 16-Pin TSSOP Package
MC9S08SF4 Series MCU Data Sheet, Rev. 4
4
Freescale Semiconductor
Introduction
3
3.1
Electrical Characteristics
Introduction
This section contains electrical and timing specifications for the MC9S08SF4 series of microcontrollers
available at the time of publication.
3.2
Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding the following classification is used and the parameters are tagged
accordingly in the tables where appropriate:
Table 1. Parameter Classifications
P
C
Those parameters are guaranteed during production testing on each individual device.
Those parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
Those parameters are derived mainly from simulations.
T
D
NOTE
The classification is shown in the column labeled “C” in the parameter
tables where appropriate.
3.3
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not
guaranteed. Stress beyond the limits specified in
Table 2
may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this section.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, either V
SS
or V
DD
) or the programmable
pullup resistor associated with the pin is enabled.
MC9S08SF4 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor
5