Datasheet> 器件分类 > 可编程逻辑器件> 可编程逻辑> EP3C80U484I7N

EP3C80U484I7N: 产品描述fpga - field programmable gate array fpga - cyclone iii 5079 labs 295 ios; 产品类别可编程逻辑器件可编程逻辑; 文件大小300KB，共14页; 制造商Altera (Intel); 标准

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EP3C80U484I7N概述

fpga - field programmable gate array fpga - cyclone iii 5079 labs 295 ios

EP3C80U484I7N规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	Altera (Intel)
零件包装代码	BGA
包装说明	FBGA, BGA484,22X22,32
针数	484
Reach Compliance Code	compli
ECCN代码	3A991
最大时钟频率	472.5 MHz
JESD-30 代码	R-PBGA-B484
JESD-609代码	e1
长度	19 mm
湿度敏感等级	3
可配置逻辑块数量	81264
输入次数	295
逻辑单元数量	81264
输出次数	295
端子数量	484
最高工作温度	100 °C
最低工作温度	-40 °C
组织	81264 CLBS
封装主体材料	PLASTIC/EPOXY
封装代码	FBGA
封装等效代码	BGA484,22X22,32
封装形状	RECTANGULAR
封装形式	GRID ARRAY, FINE PITCH
峰值回流温度（摄氏度）	260
可编程逻辑类型	FIELD PROGRAMMABLE GATE ARRAY
认证状态	Not Qualified
座面最大高度	2.2 mm
最大供电电压	1.25 V
最小供电电压	1.15 V
标称供电电压	1.2 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式	BALL
端子节距	0.8 mm
端子位置	BOTTOM
处于峰值回流温度下的最长时间	40
宽度	19 mm

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1. Cyclone III Device Family Overview

July 2012

CIII51001-2.4

Cyclone

III device family offers a unique combination of high functionality, low

power and low cost. Based on Taiwan Semiconductor Manufacturing Company

(TSMC) low-power (LP) process technology, silicon optimizations and software

features to minimize power consumption, Cyclone III device family provides the ideal

solution for your high-volume, low-power, and cost-sensitive applications. To address

the unique design needs, Cyclone III device family offers the following two variants:

■

Cyclone III—lowest power, high functionality with the lowest cost

Cyclone III LS—lowest power FPGAs with security

With densities ranging from about 5,000 to 200,000 logic elements (LEs) and

0.5 Megabits (Mb) to 8 Mb of memory for less than ¼ watt of static power

consumption, Cyclone III device family makes it easier for you to meet your power

budget. Cyclone III LS devices are the first to implement a suite of security features at

the silicon, software, and intellectual property (IP) level on a low-power and

high-functionality FPGA platform. This suite of security features protects the IP from

tampering, reverse engineering and cloning. In addition, Cyclone III LS devices

support design separation which enables you to introduce redundancy in a single

chip to reduce size, weight, and power of your application.

This chapter contains the following sections:

■

“Cyclone III Device Family Features” on page 1–1

“Cyclone III Device Family Architecture” on page 1–6

“Reference and Ordering Information” on page 1–12

Cyclone III Device Family Features

Cyclone III device family offers the following features:

Lowest Power FPGAs

■

Lowest power consumption with TSMC low-power process technology and

Altera

power-aware design flow

Low-power operation offers the following benefits:

■

Extended battery life for portable and handheld applications

Reduced or eliminated cooling system costs

Operation in thermally-challenged environments

■

Hot-socketing operation support

are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

trademarks or service marks are the property of their respective holders as described at

www.altera.com/common/legal.html.

Altera warrants performance of its

semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and

services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service

described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying

on any published information and before placing orders for products or services.

ISO

9001:2008

Registered

Cyclone III Device Handbook

Volume 1

July 2012