The UT54ACS14 and the UT54ACTS14 are hex inverters. The circuits
perform the Boolean function Y = A.
The devices are characterized over full military temperature range of
-55°C to +125°C.
FUNCTION TABLE
INPUT
A
H
L
OUTPUT
Y
L
H
A1
Y1
A2
Y2
A3
Y3
V
SS
PINOUTS
14-Pin DIP
Top View
A1
Y1
A2
Y2
A3
Y3
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
A6
Y6
A5
Y5
A4
Y4
14-Lead Flatpack
Top View
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
A6
Y6
A5
Y5
A4
Y4
LOGIC DIAGRAM
LOGIC SYMBOL
A1
A2
A3
A4
A5
A6
(1)
(3)
(5)
(9)
(11)
(13)
1
(2)
(4)
(6)
(8)
(10)
(12)
Y1
Y2
Y3
Y4
Y5
Y6
A4
Y4
A3
Y3
A2
Y2
A1
Y1
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and
IEC Publication 617-12.
A5
Y5
A6
Y6
1
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OPERATIONAL ENVIRONMENT
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
LIMIT
5.0E5
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
Θ
JC
I
I
P
D
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
15.0 (ACS)
15.5 (ACTS)
±10
1
UNITS
V
V
°C
°C
°C
°C/W
mA
W
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these
or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
4.5 to 5.5
0 to V
DD
-55 to + 125
UNITS
V
V
°C
2
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DC ELECTRICAL CHARACTERISTICS
7
(V
DD
= 5.0V
±
10%; V
SS
= 0V
6
, -55°C < T
C
< +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
V
T+
PARAMETER
Schmitt Trigger, positive going
1
threshold
ACTS
ACS
Schmitt Trigger, negative going
1
threshold
ACTS
ACS
Schmitt Trigger, typical range of hysteresis
2
CONDITION
MIN
MAX
2.25
.7V
DD
UNIT
V
V
T-
0.5
.3V
DD
0.4
0.6
1.5
1.5
1
0.40
0.25
.7V
DD
V
DD
-0.25
-200
8
200
V
V
H
ACTS
ACS
I
IN
V
OL
Input leakage current
ACTS/ACS
Low-level output voltage
3
ACTS
ACS
High-level output voltage
3
ACTS
ACS
Short-circuit output current
2,4
ACTS/ACS
Output current
10
(Sink)
I
OH
Output current
10
(Source)
P
total
Power dissipation
2, 8, 9
ACTS
ACS
I
DDQ
Quiescent
Supply
Current
∆I
DDQ
Pre-Rad
Post-Rad
Device Type 01
For input under test
V
IN
= V
DD
- 2.1V
For all other inputs
V
IN
= V
DD
or V
SS
V
DD
= 5.5V
C
IN
C
OUT
Input capacitance
5
Output capacitance
5
ƒ
= 1MHz @ 0V
ƒ
= 1MHz @ 0V
V
IN
= V
DD
or V
SS
V
DD
= V
DD
MAX
V
IN
= V
DD
or V
SS
I
OL
= 8.0mA
I
OL
= 100µA
I
OH
= -8.0mA
I
OH
= -100µA
V
O
= V
DD
and V
SS
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
V
IN
= V
DD
or V
SS
V
OH
= V
DD
- 0.4V
C
L
= 50pF
V
-1
µA
V
V
OH
V
I
OS
I
OL
mA
mA
-8
mA
1.9
1.8
10
mW/
MHz
µA
50
3.1
mA
Quiescent Supply Current Delta
ACTS
15
15
pF
pF
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%, - 50%,
as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed
to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3
Cobham Semiconductor Solutions
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3. Per MIL-PRF-38535, for current density
≤
5.0E5 amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. Device type 01 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in accordance with MIL-STD-883 Test
Method 1019 Condition A.
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
4
Cobham Semiconductor Solutions
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AC ELECTRICAL CHARACTERISTICS
2
(V
DD
= 5.0V
±10%;
V
SS
= 0V 1, -55°C < T
C
< +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
t
PHL
Input to Yn
ACS
ACTS
Input to Yn
ACS
ACTS
PARAMETER
MINIMUM
2
2
2
2
MAXIMUM
14
12
ns
13
9
UNIT
ns
t
PLH
Notes:
1. Maximum allowable relative shift equals 50mV.
2. Device type 01 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in accordance with MIL-STD-883 Test
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