REVISIONS
LTR
J
K
L
DESCRIPTION
Add device types 42, 43, 44, 45, and 46. Editorial changes to pages
1, 3, 7-15. Update boilerplate. ksr
Added provisions to accommodate radiation-hardened devices.
Added device type 47 to drawing. glg
Corrected case outline 8 Figure 1 to show correct numbering of
terminals. Corrected Figure 2 Terminal connections. Corrected the
case outline Y Figure 1 to show the proper distance of E and E1.
Added note to Case outline Y Figure 1, to allow for bottom brazed
package as an alternative style to the side brazed package . Update
boilerplate. Editorial changes throughout. ksr
Changed the minimum value for the Q dimension on package T from
0.026 to 0.020 and removed footnote 12. Editorial changes
throughout.. ksr
Added device type 48 to drawing. ksr
Corrected typo on Figure 4 (Read Cycle). ksr
Vendor requested change in capacitance in Table I for devices 39
and 40 from 5 pF to 8 pF. ksr
Vendor added RHA device type 49. Updated and re-sequenced
footnotes in Table I. Reformatted Appendixes. Update drawing to
current MIL-PRF-38535 requirements. - llb
DATE (YR-MO-DA)
98-03-03
00-03-01
00-12-08
APPROVED
Raymond Monnin
Raymond Monnin
Raymond Monnin
M
02-12-19
Raymond Monnin
N
P
R
T
03-08-12
05-08-16
06-02-13
14-06-25
Raymond Monnin
Raymond Monnin
Raymond Monnin
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
T
35
T
15
T
36
T
16
T
37
T
17
T
38
T
18
REV
T
39
T
19
T
40
T
20
T
41
T
21
T
1
T
42
T
22
T
2
T
43
T
23
T
3
T
44
T
24
T
4
T
45
T
25
T
5
T
46
T
26
T
6
T
47
T
27
T
7
T
48
T
28
T
8
T
49
T
29
T
9
T
50
T
30
T
10
T
51
T
31
T
11
T
52
T
32
T
12
T
53
T
33
T
13
T
54
T
34
T
14
SHEET
PREPARED BY
Kenneth S. Rice
CHECKED BY
Raymond Monnin
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
89-04-21
REVISION LEVEL
T
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 128K X 8 STATIC RANDOM
ACCESS MEMORY (SRAM) LOW POWER,
MONOLITHIC SILICON
SIZE
A
SHEET
CAGE CODE
67268
1 OF
54
5962-89598
5962-E258-13
DSCC FORM 2233
APR 97
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q
and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in
the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected
in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
89598
01 _
M
X
A
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix
A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Generic number 1/
Circuit function
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
Access time
120 ns
100 ns
85 ns
70 ns
120 ns
100 ns
85 ns
70 ns
55 ns
45 ns
35 ns
25 ns
120 ns
100 ns
85 ns
70 ns
55 ns
45 ns
35 ns
25 ns
20 ns
120 ns
100 ns
85 ns
70 ns
55 ns
45 ns
35 ns
25 ns
120 ns
100 ns
1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document
and will also be listed in MIL-HDBK-103.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-89598
SHEET
T
2
Device type
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Generic number 1/
Circuit function
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 standard power CMOS SRAM dual CE
128K x 8 low power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM
128K x 8 standard power CMOS SRAM dual CE
128K x 8 standard power CMOS SRAM
128K x 8 very low power CMOS SRAM
128K x 8 low power CMOS SRAM
128K x 8 low power CMOS SRAM
Access time
85 ns
70 ns
55 ns
45 ns
35 ns
25 ns
20 ns
20 ns
20 ns
15 ns
70 ns
70 ns
15 ns
12 ns
12 ns
30 ns
15 ns
40 ns
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-
JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix
A
Certification and qualification to MIL-PRF-38535
Q or V
1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
U
T
N
M
9
8
7
2/
Descriptive designator
GDIP1-T32 or CDIP2-T32
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
CQCC1-N32
See figure 1
See figure 1
See figure 1
Terminals
32
32
32
32
32
32
32
32
32
32
Package style
dual-in-line
SOJ package
dual-in-line
rectangular chip carrier
flat pack
rectangular chip carrier
rectangular chip carrier
J-leaded rectangular chip carrier
zig-zag in-line
SOJ package
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document
and will also be listed in MIL-HDBK-103.
2/ A bottom brazed option for this package now exists (See figure 1, case outline Y NOTE). Customers may specify in the
purchase order to negate the option as acceptable for their use.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-89598
SHEET
T
3
1.3 Absolute maximum ratings.
3/ 4/
-0.5 V dc to +7.0 V dc
-0.5 V dc to VCC+0.5 V dc
-0.5 V dc to VCC+0.5 V dc
-65C to +150C
1.0 W
+260C
5/
5/
Supply voltage range (V
CC
) .......................................... ……………
DC input voltage range (V
IN
) ........................................ …………...
DC output voltage range (V
OUT
) ................................... ……………
Storage temperature range .......................................... ……………
Maximum power dissipation (P
D
) ................................. ……………
Lead temperature (soldering, 10 seconds) .................. ……………
Thermal resistance, junction-to-case (θ
JC
):
Case M ...................................................................... ……………
Cases X, Y, Z, U, and 7 ............................................. ……………
Cases T, N, and 9 ...................................................... ……………
Case 8 ....................................................................... ……………
Output voltage applied in high Z state ......................... ……………
Maximum power dissipation, (P
D
) ................................ ……………
Maximum junction temperature (T
J
) ............................. ……………
1.4 Recommended operating conditions.
Supply voltage range (V
CC
) .......................................... ……………
Supply voltage range (V
SS
) .......................................... ……………
High level input voltage range (V
IH
) ............................. ……………
Low level input voltage range (V
IL
)............................... ……………
Case operating temperature range (T
C
)....................... ……………
1.5 Radiation features.
For device type 49:
Maximum total dose available (dose rate = 1 rad(Si)/s)…………..
See MIL-STD-1835
11C/W 6/
10C/W 6/
16C/W 6/
-0.5 V dc to VCC+0.5 V dc
1.0 W
+150C 7/
4.5 V dc minimum to 5.5 V dc maximum
0.0 V dc
2.2 V dc to VCC + 0.5 V dc
-0.5 V dc to 0.8 V dc
-55C to +125C
100 krads(Si) 8/
3/
4/
5/
6/
7/
8/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
All voltages referenced to V
SS
(V
SS
= ground) unless otherwise specified.
Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width.
When the θ
JC
for this case is specified in MIL-STD-1835, that value shall supersede the value indicated herein.
Maximum junction temperature may be increased to +175ºC during burn-in and steady-state life.
The device type 49 radiation end point limits for the noted parameters are guaranteed only for the conditions as
specified in MIL-STD-883, method 1019, condition B to a maximum total dose of 100 Krads(Si).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-89598
SHEET
T
4
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited
in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://quicksearch.dla.mil/
or from the Standardization Document
Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192
-
Standard Guide for the Measurement of Single Event Phenomena from
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr
Harbor Drive, West Conshohocken, PA 19428-2959;
http://www.astm.org.)
JEDEC INTERNATIONAL (JEDEC)
JESD 78
-
IC Latch-Up Test.
th
(Copies of this document are available online at
http://www.jedec.org/
or from JEDEC, 3103 North 10 Street, Suite 240-S,
Arlington, VA 22201).
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations
unless a specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix C to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device
class M.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-89598
SHEET
T
5
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