UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board
Version 1.0
Document Reference No.:FT_001191
Clearance No.: FTDI#457
Future
Technology
Devices
International Ltd
UMFT60x
(FIFO TO USB 3.0
Bridge Evaluation
Board)
The UMFT60xx is an evaluation/development
module with either FMC(LPC)/HSMC connectors
for interfacing FTDI’s FT60x USB 3.0 Superspeed
IC with external hardware. The UMFT60xx allows
for bridging a FIFO bus to a USB3.0 host and
evaluating the functionality of the FT60x.
As a daughter card, the UMFT60xx must work
with a FIFO master board which has either a FMC
or HSMC connector. There are 4 models which
provide different FIFO bus interfaces and data bit
widths.
The modules are designed such that they can
plug into most FPGA development platforms
supplied by vendors such as Xilinx or Altera.
Refer to
options.
Ordering
Information
for
module
The UMFT60xx module has the following features:
Supports USB 3.0 Super Speed (5Gbps)/USB
2.0 High Speed (480Mbps)/USB 2.0 Full Speed
(12Mbps) transfer
4 IN channels and 4 OUT channels on FIFO bus
connectivity
Supports multi voltage I/O: 1.8V, 2.5V and 3.3V
High speed connector for FIFO bus : FMC(Field
Programmable Mezzanine Card) or HSMC (High
Speed Mezzanine Card)
FMC connector is compatible with most Xilinx
FPGA reference design boards
HSMC is compatible with most Altera FPGA
reference design boards
Multi powered options: external DC powered,
BUS powered, FMC/HSMC powered
Hardware Reset and Remote Wake Up
Micro-USB3.0 receptacle
The UMFT60xx supports 2 parallel slave FIFO bus
protocols (Multi-Channel FIFO / 245 Synchronous
FIFO) with a data “burst” rate of up to 400MB/s.
For a full list of the FT60x’s features refer to the
FT60x datasheet.
Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or
reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its
documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or
implied. Future Technology Devices International Ltd will not accept any claim for damages howsoever arising as a result of u se or
failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical
appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. Th is
document provides preliminary information that may be subject to change without notice. No freedom to use patents or other
intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd,
Unit 1, 2
Seaward Place, Centurion Business Park, Glasgow G41 1HH
United Kingdom. Scotland Registered Company Number: SC136640
UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board
Version 1.0
Document Reference No.: FT_001191
Clearance No.: FTDI#457
1 Ordering Information
Part No.
UMFT600A
UMFT601A
UMFT600X
UMFT601X
Description
16 Bit FIFO bus, HSMC connector
32 Bit FIFO bus, HSMC connector
16 Bit FIFO bus, FMC (Low Pin Count)connector
32 Bit FIFO bus, FMC(Low Pin Count) connector
Table 1.1 UMFT60xx Ordering Information
Copyright © 2015 Future Technology Devices International Limited
1
UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board
Version 1.0
Document Reference No.: FT_001191
Clearance No.: FTDI#457
Table of Contents
1
2
Ordering Information ...............................................................1
Hardware Description ...............................................................3
2.1
2.2
Physical Description .....................................................................5
Dimensions .................................................................................................... 5
2.1.1
Connectors, Jumpers and Push Buttons .......................................7
CN1 - Micro USB3.0 Receptacle ........................................................................ 7
CN2 – POWER JACK 2.1MM .............................................................................. 7
JP1 – External/VBUS Powered Selection ............................................................ 7
JP2 – VCC33 Selection .................................................................................... 8
JP3, JP6– VCCIO Selection ............................................................................... 8
JP4, JP5 –FIFO mode selection and GPIO pin out ................................................ 8
SW1, SW2 – Push Buttons for Reset and Remote Wake Up .................................. 8
CN4 – FMC / HSMC FIFO bus interface connector. ............................................... 9
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
3
4
Board Schematics ...................................................................13
Hardware Setup Guide ............................................................ 18
4.1
4.2
4.3
Power Configuration .................................................................. 18
Jumpers Default Position ........................................................... 18
Power Consumption ................................................................... 19
5
Contact Information ............................................................... 20
Appendix A – References ............................................................. 21
Document References ........................................................................ 21
Acronyms and Abbreviations .............................................................. 21
Appendix B – List of Tables & Figures .......................................... 22
List of Tables ...................................................................................... 22
List of Figures .................................................................................... 22
Appendix C – Revision History ..................................................... 23
Copyright © 2015 Future Technology Devices International Limited
2
UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board
Version 1.0
Document Reference No.: FT_001191
Clearance No.: FTDI#457
2
Hardware Description
Figure 2-1 UMFT600A Module Top and Bottom View
Figure 2-2 UMFT601A Module Top and Bottom View
Figure 2-3 UMFT600X Module Top and Bottom View
Copyright © 2015 Future Technology Devices International Limited
3
UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board
Version 1.0
Document Reference No.: FT_001191
Clearance No.: FTDI#457
Figure 2-4 UMFT601X Module Top and Bottom View
The main functions of the UMFT60xx module are as follows:
Provides Multi-channel FIFO mode and 245 Synchronous FIFO mode Protocols, configured
by GPIOs.
Configurable FIFO clock: 66.67MHz and 100MHz (100MHz only for 2.5V or 3.3V VCCIO),
default clock is 100MHz.
High speed FIFO bus interface: FMC (Low Pin Count) and HSMC optional. See
Ordering
Information.
Jumpers selection allowing powered options: VBUS-powered, External DC-powered, FIFO
master board-powered.
Multi voltage VCCIO option:1.8V, 2.5V, 3.3V.
Configurable GPIOs.
Hardware reset and remote wake up support.
Available with 16bit and 32bit wide FIFO bus.
Copyright © 2015 Future Technology Devices International Limited
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