For more information, please visit the
product page.
date
12/21/2015
page
1 of 32
SERIES:
NDM2Z-50
│
DESCRIPTION:
AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
GENERAL CHARACTERISTICS
• 4.5~14 V input range
•
•
•
•
•
•
•
•
•
•
0.6~3.3 V programmable output
voltage tracking
voltage margining
active current sharing
Snapshot™
parametric capture
voltage/current/temperature monitoring
synchronization and phase spreading
remote differential voltage sense
programmable soft start and soft stop
fault management
FEATURES
• pin and function compatible with
Architects of Modern Power™
product standards
compact package, horizontal:
30.85 x 20.0 x 8.2 mm
compact package, vertical:
33.0 x 7.60 x 18.1 mm
50 A output
high efficiency
auto compensation
SMBus interface
PMBus™ Compatible
•
•
•
•
•
•
•
MODEL
NDM2Z-50
input voltage
(Vdc)
output voltage
(Vdc)
output current
max
(A)
output wattage
max
(W)
4.5~14
0.6~3.3
50
165
PART NUMBER KEY
NDM2Z-50
X
-
X
-
XXX
Base Number
Firmware Configuration:
000~ZZZ
Module Orientation and Pin Style:
HS = horizontal, surface mount
HT = horizontal, through hole mount
V = vertical
Pin Configuration:
A = 3.56 mm pin length (HT)
4.0 mm pin length (V)
B = 5.5 mm pin length (V)
Example part number:
NDM2Z-50V-A-002
vertical module
4.00 mm pin length
fi
rmware configuration 002
* HS and HT modules are delivered on tape and reel
* V modules are delivered in trays
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product page.
CUI Inc
│
SERIES:
NDM2Z-50
│
DESCRIPTION:
AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date
12/21/2015
│
page
2 of 32
ABSOLUTE MAXIMUM RATINGS
parameter
operating temperature (see
thermal consideration section)
(T
P1
, T
P2
)
storage temperature (T
S
)
input voltage (see operating in-
formation section for input and
output voltage relations)(V
I
)
logic I/O voltage
ground voltage differential
analog pin voltage
Notes:
conditions/description
min
-40
-40
-0.3
typ
max
125
125
16
6.5
0.3
6.5
units
°C
°C
V
V
V
V
CTRL, SA0, SA1, SALERT, SCL, SDA, VSET, SYNC,
DDC, PG
-S, PREF, GND
V
O
, +S, VTRK
-0.3
-0.3
-0.3
Stress in excess of Absolute Maximum Ratings may cause permanent damage. Absolute Maximum Ratings, sometimes referred to as no destruction limits, are
normally tested with one parameter at a time exceeding the limits in the Electrical Specification. If exposed to stress above these limits, function and performance
may degrade in an unspecified manner.
Configuration File
This product is designed with a digital control circuit. The control circuit uses a configuration
fi
le which determines the
functionality and performance of the product. The Electrical Specification table shows parameter values of functionality
and performance with the default configuration
fi
le, unless otherwise specified. The default configuration
fi
le is designed
to
fi
t most application needs with focus on high efficiency. If different characteristics are required it is possible to change
the configuration
fi
le to optimize certain performance characteristics. Note that current sharing operation requires changed
configuration
fi
le.
PRODUCT ELECTRICAL SPECIFICATION, HORIZONTAL
T
P1
= -30 to +95 °C, V
I
= 4.5 to 14 V, V
I
> V
O
+ 1.0 V
Typical values given at: T
P1
= +25 °C, V
I
= 12.0 V, max I
O
, unless otherwise specified under conditions.
External C
IN
= 470
μF/10
mΩ, C
OUT
= 470
μF/10
mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
parameter
input voltage rise time (V
I
)
output voltage without
pin-strap (V
O
)
output voltage adjustment
range (V
O
)
output voltage adjustment
including margining (V
O
)
output voltage set-point
resolution (V
O
)
output voltage accuracy (V
O
)
internal resistance +S/-S to
VOUT/GND (V
O
)
line regulation (V
O
)
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
=
=
=
=
=
=
=
=
=
=
=
=
0.6
1.0
1.8
3.3
0.6
1.0
1.8
3.3
0.6
1.0
1.8
3.3
V
V
V
V
V
V
V
V
V
V
V
V
including line, load, temp see note 14
current sharing operation see note 15
-1
-2
47
2
2
2
3
2
2
2
2
20
25
30
35
see note 17
0.60
0.54
±0.025
1
2
conditions/description
monotonic
1.2
3.3
3.63
min
typ
max
2.4
units
V/ms
V
V
V
%FS
%
%
Ω
mV
mV
mV
mV
mV
mV
mV
mV
mVp-p
mVp-p
mVp-p
mVp-p
load regulation (V
O
)
I
O
= 0~100%
output ripple & noise (V
oac
)
C
O
= 470
μF
(minimum external
capacitance) see note 11
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For more information, please visit the
product page.
CUI Inc
│
SERIES:
NDM2Z-50
│
DESCRIPTION:
AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date
12/21/2015
│
page
3 of 32
PRODUCT ELECTRICAL SPECIFICATION, HORIZONTAL (CONTINUED)
parameter
output current (I
O
)
static input current at max I
O
(I
S
)
current limit threshold (I
lim
)
short circuit current(I
SC
)
RMS, hiccup mode,
see note 3
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
V
V
V
V
O
V
O
V
O
V
O
=
=
=
=
0.6
1.0
1.8
3.3
V
V
V
V
=
=
=
=
=
=
=
=
=
=
=
=
0.6
1.0
1.8
3.3
0.6
1.0
1.8
3.3
0.6
1.0
1.8
3.3
V
V
V
V
V
V
V
V
V
V
V
V
conditions/description
see note 18
V
O
V
O
V
O
V
O
=
=
=
=
0.6
1.0
1.8
3.3
V
V
V
V
52
11
9
7
6
85.6
90.4
93.7
95.7
80.5
86.9
91.6
94.6
7.25
7.54
8.28
9.36
0.90
0.90
1.10
1.67
170
140
400
see note 9
see note 9
default configuration
di/dt = 2 A/μs C
O
= 470
μF
(minimum external
capacitance)
see note 12
default configuration
di/dt = 2 A/μs C
O
= 470
μF
(minimum external
capacitance)
see note 12
PMBus configurable
-5
5
150
external clock source
-13
13
V
O
V
O
V
O
V
O
V
O
V
O
V
O
V
O
=
=
=
=
=
=
=
=
0.6
1.0
1.8
3.3
0.6
1.0
1.8
3.3
V
V
V
V
V
V
V
V
470
5
79/256
127/298
144/324
210/327
60/100
100/100
100/100
100/100
320
200-640
5
95
30,000
30
min
0.001
3.10
4.80
8.19
14.53
65
typ
max
50
units
A
A
A
A
A
A
A
A
A
A
%
%
%
%
%
%
%
%
W
W
W
W
W
W
W
W
mW
μF
μF
μF
mΩ
mV
mV
mV
mV
μs
μs
μs
μs
kHz
kHz
%
%
ns
%
50% of max I
O
efficiency (η)
max I
O
V
O
V
O
V
O
V
O
=
=
=
=
0.6
1.0
1.8
3.3
power dissipation at max I
O
(P
d
)
input idling power (no load)(P
li
)
default configuration:
continues conduction
mode, CCM
turned off with CTRL-pin
input standby power (P
CTRL
)
internal input capacitance (C
i
)
internal output capacitance (C
o
)
total external output
capacitance (C
OUT
)
ESR range of capacitors
(per single capacitor) (C
OUT
)
load transient peak voltage
deviation (L to H/H to L) load
step 25-75-25% of max I
O
(V
tr1
)
default configuration:
monitoring enabled,
precise timing enabled
load transient recovery time
note 5 (L to H/H to L) load step
25-75-25% of max I
O
(t
tr1
)
switching frequency (f
s
)
switching frequency range (f
s
)
switching frequency set-point
accuracy (f
s
)
control circuit PWM duty cycle
minimum sync pulse width
input clock frequency drift
tolerance
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product page.
CUI Inc
│
SERIES:
NDM2Z-50
│
DESCRIPTION:
AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date
12/21/2015
│
page
4 of 32
PRODUCT ELECTRICAL SPECIFICATION, HORIZONTAL (CONTINUED)
parameter
conditions/description
UVLO threshold
UVLO threshold range
set point accuracy
input under voltage lockout,
UVLO
UVLO hysteresis
UVLO hysteresis range
delay
fault response
IOVP threshold
IOVP threshold range
set point accuracy
input over voltage protection,
IOVP
IOVP hysteresis
IOVP hysteresis range
delay
fault response
PG threshold
power good, PG, see note 2
PG hysteresis
PG delay
PG delay range
UVP threshold
UVP threshold range
UVP hysteresis
output voltage over/under
voltage protection, OVP/UVP
OVP threshold
OVP threshold range
UVP/OVP response time
UVP/OVP
response time range
fault response
OCP threshold
OCP threshold range
over current protection, OCP
protection delay
protection delay range
fault response
OTP threshold
over temperature protection,
OTP at P2 see note 8
OTP threshold range
OTP hysteresis
OTP hysteresis range
fault response
PMBus configurable
see note 3
PMBus configurable
-40
25
0-165
automatic restart, 240 ms
PMBus configurable
see note 4
PMBus configurable
see note 3
PMBus configurable
see note 3
PMBus configurable
PMBus configurable
see note 19
PMBus configurable
see note 3
PMBus configurable
PMBus configurable
-150
1
0-11.8
2.5
automatic restart, 70 ms
90
5
direct after DLC
0-500
85
0-100
5
115
100-115
25
5-60
automatic restart, 70 ms
62
0-62
32
1-32
automatic restart, 70 ms
120
125
°C
°C
°C
°C
A
A
T
SW
T
SW
%V
o
%V
o
ms
s
%V
o
%V
o
%V
o
%V
o
%V
o
μs
μs
see note 3
PMBus configurable
PMBus configurable
-150
0.35
0-10.15
2.5
automatic restart, 70 ms
16
4.2-16
150
V
V
mV
V
V
μs
min
typ
3.85
3.85-14
150
max
units
V
V
mV
V
V
μs
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CUI Inc
│
SERIES:
NDM2Z-50
│
DESCRIPTION:
AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date
12/21/2015
│
page
5 of 32
PRODUCT ELECTRICAL SPECIFICATION, HORIZONTAL (CONTINUED)
parameter
logic input low threshold(V
IL
)
logic input high threshold (V
IH
)
logic input low sink current(I
IL
)
logic output low signal level
(V
OL
)
logic output high signal level
(V
OH
)
logic output low sink current
(I
OL
)
logic output high source current
(I
OH
)
setup time, SMBus(t
SET
)
hold time, SMBus(t
hold
)
bus free time, SMBus(t
free
)
internal capacitance on logic
pins (C
P
)
initialization time
delay duration
output voltage delay time see
note 6
delay duration range
delay accuracy turn-on
delay accuracy turn-off
ramp duration
output voltage ramp time
see note 13
ramp duration range
ramp time accuracy
V
VTRK
= 5.5 V
100% tracking, see note 7
VTRK tracking ramp accuracy
(V
O
- V
VTRK
)
current sharing operation
2 phases, 100% tracking
V
O
= 1.0 V, 10 ms ramp
100% Tracking
current sharing operation
100% Tracking
steady state operation
ramp-up
-1
-2
-100
±100
1
2
PMBus configurable
current sharing
operation
see note 10
see note 16
PMBus configurable
see note 1
see note 1
see note 1
300
250
2
10
40
10
5-500,000
-0.25/+4
-0.25/+4
10
0-200
100
20
110
200
100
2.25
SYNC, SCL, SDA, SALERT, DDC, PG
4
2
mA
mA
ns
ns
ms
pF
ms
ms
ms
ms
ms
ms
ms
μs
%
μA
mV
mV
%
%
conditions/description
SYNC, SA0, SA1, SCL, SDA, DDC, CTRL, VSET
CTRL
min
2
0.6
0.4
typ
max
0.8
units
V
V
mA
V
V
VTRK input bias current
VTRK regulation accuracy
(V
O
- V
VTRK
)
current difference between
products in a current
sharing group
number of products in a current
sharing group
Max 2 x READ_IOUT monitoring
accuracy
4
7
A
READ_VIN vs V
I
READ_VOUT vs V
O
monitoring accuracy
READ_IOUT vs I
O
READ_IOUT vs I
O
I
O
= 0-50 A, T
P1
= 0 to +95 °C
V
I
= 4.5-14 V, V
O
= 1.0 V
I
O
= 0-50 A, T
P1
= 0 to +95 °C
V
I
= 4.5-14 V, V
O
= 0.6-3.3 V
3
1
±3
±5
%
%
A
A
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