Data Sheet
PT7M7803/7809-7812/7823-7825
µP Supervisor Circuits
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Features
Precision supply-voltage monitor
- 4.63V (PT7M78xxL)
- 4.38V (PT7M78xxM except PT7M7803/09/10M)
- 3.08V (PT7M78xxT)
- 2.93V (PT7M78xxS)
- 2.63V (PT7M78xxR)
- 2.32V (PT7M78xxZ)
- 2.20V (PT7M78xxY)
- 4.00V (PT7M78xxJ)
- 4.26V (PT7M7803/09/10M)
- 2.25V (PT7M7823/24K)
200ms reset pulse width
Debounced CMOS-compatible manual-reset input
(7811, 7812, 7823, 7825)
Reset Output Signal for Watchdog and Power
Abnormal, Manual Reset
Reset Push-Pull output (PT7M7809,7811,7823,
7824,7825)
Reset Open-Drain output (PT7M7803)
Voltage monitor for power-fail or low battery
warning
Guaranteed RESET/RESET valid at V
CC
=1.0V
Description
The PT7M78xx family microprocessor (µP)
supervisory circuits are targeted to improve reliability
and accuracy of power-supply circuitry in
µP
systems.
These devices reduce the complexity and number of
components required to monitor power-supply and
battery functions.
The main functions are:
1. Asserting reset output during power-up, power-
down and brownout conditions for
µP
system.
2. Detecting power failure or low-battery
conditions with a 1.25V threshold detector.
3. Watchdog functions
4. Manual reset.
Applications
Power-supply circuitry in
µP
systems
Ordering Information
Part Number
PT7M7803XTE
PT7M7809XTE
PT7M7810XTE
PT7M7811XTAE
PT7M7812XTAE
PT7M7823XTAE
Package
Lead free and Green SOT23-3
Lead free and Green SOT23-3
Lead free and Green SOT23-3
Lead free and Green SOT23-5
Lead free and Green SOT23-5
Lead free and Green SOT23-5
Part Number
PT7M7824XTAE
PT7M7825XTAE
PT7M7811XTBE
PT7M7812XTBE
PT7M7809XUWF
Package
Lead free and Green SOT23-5
Lead free and Green SOT23-5
Lead free and Green SOT143
Lead free and Green SOT143
Wafer form
Note:
“X” refers to voltage range, see below table.
Suffix: X—Monitored Voltage
X
L
Reset Threshold (V)
4.63
M
1)
4.38
T
3.08
S
2.93
R
2.63
Z
2.32
Y
2.20
J
4.00
K
2)
2.25
Note1):
Threshold voltage=4.38V can be applied to all parts except PT7M7803/09/10M. PT7M7803/09/10M’s threshold voltage
is 4.26V.
2): Threshold voltage=2.25V only for PT7M7823/24K.
PT0109(10/10)
1
Ver: 15
Data Sheet
PT7M7803/7809-7812/7823-7825
µP Supervisor Circuits
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Pin Description
Pin
MR
Type
I
Description
Manual-Reset: (CMOS).
Active low. Pull low to force a reset. Reset remains asserted for the duration of
the Reset Timeout Period after MR transitions from low to high. Leave unconnected or connected to VCC
if not used.
Supply Voltage.
Reset is asserted when V
CC
drops below the Reset Threshold Voltage (V
RST
). Reset
remains asserted until V
CC
rises above V
RST
and keep asserted for the duration of the Reset Timeout
Period (t
RS
) once V
CC
rises above V
RST
.
Ground Reference
for all signals.
Power-Fail Voltage Monitor Input.
When PFI <V
PFT
, PFO goes low. Connect PFI to GND or Vcc when
not used.
Power-Fail Output:
it gets low and sinks current when PFI is less than 1.25V; otherwise PFO stays high.
Watchdog Input (CMOS).
If WDI remains high or low for the duration of the watchdog timeout period
(t
WD
), the internal watchdog timer trigger a reset output. Floating WDI or connecting WDI to a high-
impedance three-state buffer disables the watchdog feature. The internal watchdog timer clears whenever
reset is asserted or WDI occurs a rising or falling edge.
Active-Low Reset Output (Push-Pull or Open-Drain).
It goes low when Vcc is below the reset
threshold. It remains low for about 200ms after one of the following occurs: Vcc rises above the reset
threshold (VRST), the watchdog triggers a reset, or MR goes from low to high.
The inverse of RESET,
active high. Whenever RESET is high, RESET is low.
No connection.
VCC
Power
GND
PFI
PFO
-
I
O
WDI
I
RESET
RESET
NC
O
O
-
Functional Description
Reset Output
A microprocessor (µP) reset input starts the
µP
in a known state. Whenever the
µP
is in an unknown state, it should be held in
reset. The supervisory circuits assert reset during power-up and prevent code execution errors during power-down or brownout
conditions.
On power-up, once Vcc reaches about 1.0V, RESET is a guaranteed logic low of 0.4V or less. As Vcc rises, RESET stays low.
When Vcc rises above the reset threshold, an internal timer releases RESET after about 200ms. RESET pulses low whenever Vcc
drops below the reset threshold, i.e. brownout condition. If brownout occurs in the middle of a previously initiated reset pulse, the
pulse continues for at least another 200ms. On power-down, once Vcc falls below the reset threshold, RESET stays low and is
guaranteed to be 0.4V or less until Vcc drops below 1.0V. Watchdog Timing Diagram shows the timing relationship.
The active-high RESET output is simply the inverse of the RESET output, and is guaranteed to be valid with Vcc down to 1.0V.
Watchdog Timer
The PT7M78xx watchdog circuit monitors the
µP
activity. If the
µP
does not toggle the watch-dog input (WDI) within 1.6s, reset
asserts. As long as reset is asserted or the WDI input is toggled, the watchdog timer will stay clear and will not count. As soon as
reset is released, the timer will start counting. WDI input pulses as short as 50ns can be detected.
Disable the watchdog function by leaving WDI unconnected or by three-stating driver connected to WDI.
Manual Reset
The manual-reset input (MR) allows reset to be triggered by a push button switch. MR has an internal pullup resistor, so it can be
left open when not used.
Power-Fail Comparator
The power-fail comparator can be used for various purposes because its output and noninverting input are not internally connected.
The inverting input is internally connected to a 1.25V reference.
PT0109(10/10)
5
Ver: 15
DSP 与 ARM 处理器
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