Dual DVB-S2/S2X/T/C/S Digital TV Demodulator
Description
The Si21672D integrates two separate high-performance digital
demodulators for the DVB-T/C, DVB-S2/S and DVB-S2X
standards into a single compact package. Leveraging Silicon Labs'
proven digital demodulation architecture, the Si21672D achieves
excellent reception performance for each media while significantly
minimizing front-end design complexity, cost, and power
dissipation. Connecting the Si21672D to both a dual terrestrial/
cable TV tuner, and a dual satellite tuner, results in a
high-performance and cost optimized TV front-end solution.
The DVB-T and DVB-C, including ITU-T J.83 annex B,
demodulators are enhanced versions of proven and broadly used
Si2164/67/68/69 Silicon Labs devices.
The satellite reception allows demodulating widespread DVB-S,
DIRECTV™ (DSS), DVB-S2, DIRECTV™ (AMC) legacy
standards, and new Part II of DVB-S2 (S2X) satellite broadcast
standard. A zero-IF interface (differential) allows for a seamless
connection to market proven satellite silicon tuners. It also
integrates two DiSEqC™ 2.0 LNB interfaces for satellite dish
control and, for each satellite demodulator, an equalizer to
compensate for echoes in long cable feeds from the LNB to the
satellite tuner RF input.
The Si21672D offers an on-chip blind scanning algorithm for
DVB-S/S2/S2X and DVB-C standards, as well as blind lock
function.
The Si21672D embeds two independent programmable transport
stream interfaces which provide a flexible range of output modes,
including a cross-bar functionality, and are fully compatible with all
MPEG decoders or conditional access modules to support any
customer application.
Si21672-D60
Features
-
-
-
-
-
Pin-to-pin compatible with all dual demodulator family: Si216x2
and Si218x2
API compatible with all single and all dual demodulators
DVB-T (ETSI EN 300 744)
-
NorDig Unified 2.5, D-Book 8 compliant
DVB-C (ETSI EN 300 429) / ITU-T J.83 Annex A/B/C
-
1 to 7.2 MSymbol/s, C-Book compliant
DVB-S2 (ETSI EN 302 307-1 V1.4.1)
-
QPSK/8PSK demodulator
-
DVB-S2X (ETSI EN302 307-2 V1.1.1)
-
QPSK/8PSK, 8/16/32APSK demodulator
-
Roll-off factors from 0.05 to 0.35
-
Channel bonding for TS transmission supported
-
DVB-S (ETSI EN 300 421) and DSS supported
-
Dual DiSEqC™ 2.x interface, Unicable support
-
1 to 45 MSps for all satellite standards
(<40 MSps in 32APSK)
-
I
2
C serial bus interfaces (master and host)
-
Upgradeable with firmware patch download via fast SPI or I
2
C
-
-
-
-
-
-
-
-
-
-
(broadcast mode supported)
Dual independent differential IF input for T/C tuners and differ-
ential ZIF I/Q inputs for satellite tuners
GPIOs and multi-purpose ports (two per demodulator)
Separate flexible TS interfaces with serial or parallel
outputs and cross-bar feature
Fast lock times for all standards
Only two power supplies: 1.2 and 3.3 V
8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant
Multi-receiver iDTV: on-board or in a NIM
Advanced multimedia PVR STBs
PC-TV accessories
PVR, DVD, and Blu-Ray disc recorders
Applications
1.2, 3.3V
RESETB
MP_A_A
MP_C_A
S_ADC_IP_A
S_ADC_IN_A
S_ADC_QP_A
S_ADC_QN_A
Si21672D
ADC_A
ADC_A
Dual Satellite
Tuner
DEMODULATOR_A CORE
TS_A
TC_ADC_P_A
TC_ADC_N_A
DiSEqC_OUT_A
DiSEqC_CMD/IN_A
ADC_A
DiSEqC_A
I2C Block_A
TS1_SYNC
TS1_DATA
TS1_VAL
8
TS1_CLK
GPIO1/
TS_ERR_A
ADDR_A
SDA_HOST
SCL_HOST
TV Tuner
DiSEqC_IN_A_B
SDA_MAST
SCL_MAST
XO
XTAL_I/CLK_IN
CLK_IN/OUT
DiSEqC_OUT_B
DiSEqC_B
ADC_B
ADC_B
ADDR_B
I2C Block_B
TS_B
TV Tuner
TC_ADC_P_B
TC_ADC_N_B
GPIO0/
TS_ERR_B
S_ADC_IP_B
S_ADC_IN_B
S_ADC_QP_B
S_ADC_QN_B
MP_B_B
MP_D_B
DEMODULATOR_B CORE
TS2_SYNC
TS2_DATA
TS2_VAL 8
TS2_CLK
ADC_B
Dual Digital Demodulators
Copyright © 2015 by Silicon Laboratories
HDTV MPEG S.o.C.
11.5.15
Dual DVB-S2/S2X/T/C/S Digital TV Demodulator
Selected Electrical Specifications
(T
A
= –10 to 70 °C)
.
Parameter
General
Input clock reference
Supported XTAL frequency
Total power consumption for
each demodulator
Test Condition
Min
4
16
—
—
—
—
—
1.14
3.00
3.00
Typ
—
—
182
142
421
230
42
1.20
3.30
3.30
Max
30
30
—
—
—
—
—
1.30
3.60
3.60
Unit
MHz
MHz
mW
mW
mW
mW
°C/W
V
V
V
Si21672-D60
DVB-T
1
DVB-C
2
DVB-S2
3
DVB-S
4
4 layer PCB
Power Supplies
V
DD
_
VCORE
V
DD
_
VANA
V
DD
_
VIO
Thermal resistance (
JA
)
Notes:
1.
Test conditions: 8 MHz, 8K FFT, 64-QAM, parallel TS.
2.
Test conditions: 6.9 Mbaud, 256-QAM, parallel TS.
3.
Test conditions: 32 Mbaud, CR = 3/5, 8PSK, pilots On, parallel TS, C/N at picture failure.
4.
Test conditions: 30 Mbaud, CR = 7/8, parallel TS, at QEF: BER = 2 x 10
–4
.
Pin Assignments
GPIO_1/TS_ERR_A
XTAL_I/CLK_IN
TS2_DATA[7]
TS1_DATA[7]
TS2_DATA[6]
TS1_DATA[6]
TS1_SYNC
TS2_DATA[5]
S_ADC_IP_A
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
S_ADC_IN_A
52
S_ADC_QP_A
53
S_ADC_QN_A
54
S_ADC_IP_B
55
VDD_CORE
VDD_CORE
VDD_ANA
ADDR_B
ADDR_A
RESETB
MP_D_B
MP_C_A
XO
34
TS1_DATA[5]
33
VDD_VIO
32
GND
31
VDD_CORE
S_ADC_IN_B
56
S_ADC_QP_B
57
S_ADC_QN_B
58
TC_ADC_P_A
59
TC_ADC_N_A
60
TC_ADC_P_B
61
TC_ADC_N_B
62
CLK_IN_OUT
63
SDA_MAST
64
30
VDD_CORE
Si21672D
(GND_PAD)
29
TS2_DATA[4]
28
TS1_DATA[4]
27
TS2_DATA[3]
26
TS1_DATA[3]
25
TS2_DATA[2]
24
TS1_DATA[2]
23
TS2_DATA[1]
22
TS1_DATA[1]
QFN-68
8x8mm
SCL_MAST
65
GND
66
VDD_CORE
67
21
TS2_DATA[0]/TS2_SER
20
TS1_DATA[0]/TS1_SER
19
TS2_CLK
18
TS1_CLK
VDD_CORE
68
1
MP_A_A
2
MP_B_B
3
GPIO_0/TS_ERR_B
4
DISEQC_CMD/IN_A
5
DISEQC_IN_A_B
6
DISEQC_OUT_A
7
DISEQC_OUT_B
8
VDD_CORE
9 10 11 12 13 14 15 16 17
GND
VDD_CORE
SCL_HOST
SDA_HOST
TS2_SYNC
TS1_VAL
TS2_VAL
Selection Guide
Part #
Si21672-D60-GM/R
Description
Dual Digital TV Demodulator for DVB-S2/S2X/T/C/S, 8x8 mm QFN-68
Dual Digital Demodulators
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Copyright © 2015 by Silicon Laboratories
VDD_VIO
11.5.15
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