74AXP2G07
Low-power dual buffer with open-drain output
Rev. 1 — 24 September 2014
Product data sheet
1. General description
The 74AXP2G07 is a dual non-inverting buffer with open-drain outputs.
Schmitt-trigger action at the inputs makes the circuit tolerant of slower input rise and fall
times.
This device ensures very low static and dynamic power consumption across the entire
V
CC
range from 0.7 V to 2.75 V. It is fully specified for partial power-down applications
using I
OFF
. The I
OFF
circuitry disables the output, preventing the potentially damaging
backflow current through the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.7 V to 2.75 V
Low input capacitance; C
I
= 0.5 pF (typical)
Low output capacitance; C
O
= 0.7 pF (typical)
Low dynamic power consumption; C
PD
= 1.0 pF at V
CC
= 1.2 V (typical)
Low static power consumption; I
CC
= 0.6
A
(85
C
maximum)
High noise immunity
Complies with JEDEC standard:
JESD8-12A.01 (1.1 V to 1.3 V)
JESD8-11A.01 (1.4 V to 1.6 V)
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A.01 (2.3 V to 2.7 V)
ESD protection:
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
CDM JESD22-C101E exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 2.75 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
NXP Semiconductors
74AXP2G07
Low-power dual buffer with open-drain output
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AXP2G07GM
74AXP2G07GN
74AXP2G07GS
40 C
to +85
C
40 C
to +85
C
40 C
to +85
C
Name
XSON6
XSON6
XSON6
Description
Version
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
1.45
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
SOT1115
SOT1202
Type number
4. Marking
Table 2.
Marking codes
Marking code
[1]
r7
r7
r7
Type number
74AXP2G07GM
74AXP2G07GN
74AXP2G07GS
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
74AXP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 24 September 2014
2 of 16
NXP Semiconductors
74AXP2G07
Low-power dual buffer with open-drain output
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration SOT886, SOT1115 and SOT1202
6.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
V
CC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
7. Functional description
Table 4.
Input
nA
L
H
[1]
Function table
[1]
Output
nY
L
Z
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF state.
74AXP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 24 September 2014
3 of 16
NXP Semiconductors
74AXP2G07
Low-power dual buffer with open-drain output
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
50
[1]
Max
+3.3
-
+3.3
-
+3.3
20
50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
< 0 V
V
O
= 0 V to V
CC
0.5
-
-
50
65
T
amb
=
40 C
to +85
C
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
9. Recommended operating conditions
Table 6.
Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
T
amb
t/V
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 0.7 V to 2.75 V
Active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
0.7
0
0
0
40
0
Max
2.75
2.75
V
CC
2.75
+85
200
Unit
V
V
V
V
C
ns/V
74AXP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 24 September 2014
4 of 16
NXP Semiconductors
74AXP2G07
Low-power dual buffer with open-drain output
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions, unless otherwise specified; voltages are referenced to GND (ground = 0 V).
Symbol
V
IH
Parameter
HIGH-level input
voltage
Conditions
Min
V
CC
= 0.75 V to 0.85 V
V
CC
= 1.1 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
IL
LOW-level input
voltage
V
CC
= 0.75 V to 0.85 V
V
CC
= 1.1 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
OL
LOW-level output
voltage
I
O
= 20
A;
V
CC
= 0.7 V
I
O
= 100
A;
V
CC
= 0.75 V
I
O
= 2 mA; V
CC
= 1.1 V
I
O
= 3 mA; V
CC
= 1.4 V
I
O
= 4.5 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
I
I
OZ
I
OFF
I
OFF
I
CC
I
CC
input leakage
current
OFF-state output
current
power-off leakage
current
V
I
= 0 V to 2.75 V;
V
CC
= 0 V to 2.75 V
V
I
= V
IL
; V
O
= 0 V to 2.75 V
V
I
or V
O
= 0 V to 2.75 V;
V
CC
= 0 V
[1]
T
amb
=
40 C
to +85
C
Typ 25
C
Max 25
C
Max 85
C
-
-
-
-
-
-
0.01
-
-
-
-
-
0.001
0.02
0.01
0.02
0.01
2
-
-
-
0.25V
CC
0.35V
CC
0.7
-
0.1
0.275
0.35
0.45
0.7
0.1
0.1
0.1
0.1
0.3
100
-
-
-
0.25V
CC
0.35V
CC
0.7
-
0.1
0.275
0.35
0.45
0.7
0.5
0.5
0.5
0.5
0.6
150
0.75V
CC
0.65V
CC
1.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
V
V
V
V
V
V
V
V
V
V
V
V
A
A
A
A
A
A
[1]
[1]
additional power-off V
I
or V
O
= 0 V or 2.75 V;
leakage current
V
CC
= 0 V to 0.1 V
supply current
additional supply
current
V
I
= 0 V or V
CC
; I
O
= 0 A
V
I
= V
CC
0.5 V; I
O
= 0 A;
V
CC
= 2.5 V
[1]
[1]
[1]
Typical values are measured at V
CC
= 1.2 V.
74AXP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 24 September 2014
5 of 16
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