®
LY612568
Rev. 1.0
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision
Rev. 0.1
Rev. 0.2
Description
Preliminary
Revised Test Condition of I
SB1
/I
DR
Revised V
TERM
to V
T1
and V
T2
Revised
FEATURES
&
ORDERING INFORMATION
Lead free and green package available
to
Green package
available
Added packing type in
ORDERING INFORMATION
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Revised
PACKAGE OUTLINE DIMENSION
Revised
ORDERING INFORMATION
in page 9
Revised Notes item 1 and 2 in page 3
1. V
IH
(max) = V
CC
+ 2.0V for pulse width less than 6ns.
2. V
IL
(min) = V
SS
- 2.0V for pulse width less than 6ns.
Issue Date
Dec.6.2006
Aug.26.2009
Rev. 0.3
Rev. 1.0
Aug.30.2010
Aug.29.2013
Revised
ORDERING INFORMATION
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
®
LY612568
Rev. 1.0
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
GENERAL DESCRIPTION
The LY612568 is a 2,097,152-bit low power CMOS
static random access memory organized as 262,144
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY612568 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The LY612568 operates from a single power
supply of 5V and all inputs and outputs are fully TTL
compatible
FEATURES
Fast access time : 15/20/25ns
Low power consumption:
Operating current: 100/80/75mA (TYP.)
Standby current: 100µA (TYP.)
Single 5V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 2.0V (MIN.)
Green package available
Package : 44-pin 400 mil TSOP-II
PRODUCT FAMILY
Product
Family
LY612568
LY612568(E)
LY612568(I)
Operating
Temperature
0 ~ 70℃
-20 ~ 80℃
-40 ~ 85℃
Vcc Range
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
Speed
15/20/25ns
15/20/25ns
15/20/25ns
Power Dissipation
Standby(I
SB1,
TYP.) Operating(Icc,TYP.)
100µA
100/80/75mA
100µA
100/80/75mA
100µA
100/80/75mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Vcc
Vss
A0 - A17
DQ0 – DQ7
DECODER
256Kx8
MEMORY ARRAY
CE#
WE#
OE#
V
CC
V
SS
NC
A0-A17
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
LY612568
Rev. 1.0
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
PIN CONFIGURATION
NC
NC
A4
A3
A2
A1
A0
CE#
DQ0
DQ1
Vcc
Vss
DQ2
DQ3
WE#
A17
A16
A15
A14
A13
NC
NC
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
NC
NC
NC
A5
A6
A7
A8
OE#
DQ7
DQ6
Vss
Vcc
DQ5
DQ4
A9
A10
A11
A12
NC
NC
NC
NC
LY612568
XXXXXXX
XXXX
9
10
11
12
13
14
15
16
17
18
19
20
21
22
36
35
34
33
32
31
30
29
28
27
26
25
24
23
TSOP-II
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
RATING
-0.5 to 6.5
-0.5 to V
CC
+0.5
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
LY612568
Rev. 1.0
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB1
I
CC
I
CC
I
CC
H = V
IH
, L = V
IL
, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
PARAMETER
Supply Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
CC
≧
V
IN
≧
V
SS
Output Leakage
V
CC
≧
V
OUT
≧
V
SS
,
I
LO
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -4mA
Output Low Voltage
V
OL
I
OL
= 8mA
-15
Cycle time = Min.
Average Operating
I
CC
CE# = V
IL
, I
I/O
= 0mA
-20
Power supply Current
Other pins at V
IH
or V
IL
-25
Standby Power
CE#
≧
V
CC
- 0.2V
I
SB1
Supply Current
Other pins at 0.2V or V
CC
-0.2V
Notes:
1. V
IH
(max) = V
CC
+ 2.0V for pulse width less than 6ns.
2. V
IL
(min) = V
SS
- 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
5. 1mA for special request
MIN.
4.5
2.2
- 0.3
-1
-1
2.4
-
-
-
-
-
TYP.
5.0
-
-
-
-
*4
MAX.
5.5
V
CC
+0.3
0.8
1
1
-
0.4
140
110
100
3*
5
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
-
-
100
80
75
0.1
CAPACITANCE
(T
A
= 25
℃
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
8
10
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
®
LY612568
Rev. 1.0
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -8mA/16mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
LY612568-15
MIN.
MAX.
15
-
-
15
-
15
-
7
4
-
0
-
-
7
-
7
3
-
LY612568-20
MIN.
MAX.
20
-
-
20
-
20
-
8
4
-
0
-
-
8
-
8
3
-
LY612568-25
MIN.
MAX.
25
-
-
25
-
25
-
9
4
-
0
-
-
9
-
9
3
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
LY612568-15
MIN.
MAX.
15
-
12
-
12
-
0
-
10
-
0
-
8
-
0
-
4
-
-
8
LY612568-20
MIN.
MAX.
20
-
16
-
16
-
0
-
11
-
0
-
9
-
0
-
5
-
-
9
LY612568-25
MIN.
MAX.
25
-
20
-
20
-
0
-
12
-
0
-
10
-
0
-
6
-
-
10
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
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