Philips Semiconductors Linear Products
Product specification
Addressable relay driver
NE/SA5090
DESCRIPTION
The NE/SA5090 addressable relay driver is a high-current latched
driver, similar in function to the 9934 address decoder. The device
has 8 open-collector Darlington power outputs, each capable of
150mA load current. The outputs are turned on or off by respectively
loading a logic “1” or logic “0” into the device data input. The
required output is defined by a 3-bit address. The device must be
enabled by a CE input line which also serves the function of further
address decoding. A common clear input, CLR, turns all outputs off
when a logic “0” is applied. The device is packaged in a 16-pin
plastic or Cerdip package.
PIN CONFIGURATION
D
1
, N Packages
A
0
1
A
1
2
A
2
3
Q
0
4
Q
1
5
Q
2
6
Q
3
7
16
15
14
13
12
11
10
9
V
CC
CLR
CE
D
Q
7
Q
6
Q
5
Q
4
FEATURES
GND 8
•
8 high-current outputs
•
Low-loading bus-compatible inputs
•
Power-on clear ensures safe operation
•
Will operate in addressable or demultiplex mode
•
Allows random (addressed) data entry
•
Easily expandable
•
Pin-compatible with 9334 (Siliconix or Fairchild)
TOP VIEW
NOTE:
1. SOL - Released in Large SO package only.
APPLICATIONS
•
Relay driver
•
Indicator lamp driver
•
Triac trigger
•
LED display digit driver
•
Stepper motor driver
BLOCK DIAGRAM
CLR
LATCH
LATCH
LATCH
LATCH
A
1
1–OF–8
DECODER
CONTROL
GATE
LATCH
LATCH
LATCH
LATCH
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
CE
A
0
A
2
D
INPUT STAGE
V
CC
OUTPUT STAGE
August 31, 1994
512
853-0892 13721
Philips Semiconductors Linear Products
Product specification
Addressable relay driver
NE/SA5090
PIN DESIGNATION
PIN NO.
1-3
4-7, 9-12
13
SYMBOL
A
0
-A
2
Q
0
-Q
7
D
NAME AND FUNCTION
A 3-bit binary address on these pins defines which of the 8 output latches is to receive the data.
The 8 device outputs.
The data input. When the chip is enabled, this data bit is transferred to the defined output such that:
“1” turns output switch “ON”
“0” turns output switch “OFF”
14
15
CE
CLR
The chip enable. When this input is low, the output latches will accept data. When CE goes high, all
outputs will retain their existing state, regardless of address of data input condition.
The clear input. When CLR goes low all output switches are turned “OFF”. The high data input will
override the clear function on the addressed latch.
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Small Outline Large (SOL) Package
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Small Outline Large (SOL) Package
TEMPERATURE RANGE
0 to +70°C
0 to +70°C
-40 to +85°C
–40 to +85°C
ORDER CODE
NE5090D
NE5090N
SA5090N
SA5090D
DWG #
0171B
0406C
0406C
0171B
TRUTH TABLE
INPUTS
CL
R
L
L
L
L
L
L
L
H
H
H
H
H
H
H
C
E
H
L
L
L
L
L
L
H
L
L
L
L
L
L
D
X
L
H
L
H
L
H
X
L
H
L
H
L
H
A
0
OUTPUTS
A
1
MODE
Q
5
A
2
Q
0
Q
1
Q
2
Q
3
Q
4
Q
6
Q
7
X
L
L
H
H
H
H
X
L
L
H
H
H
H
X
L
L
L
L
H
H
X
L
L
L
L
H
H
X
L
L
L
L
H
H
X
L
L
L
L
H
H
H
H
L
H
H
H
H
Q
N-1
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
Clear
Demultiplex
Memory
Q
N-1
Q
N-1
Q
N-1
Q
N-1
H
L
Addressable Latch
Q
N-1
H
Q
N-1
L
Q
N-1
Q
N-1
NOTES:
X=Don’t care condition
Q
N-1
=Previous output state
L=Low voltage level/“ON” output state
H=High voltage level/“OFF” output state
August 31, 1994
513
Philips Semiconductors Linear Products
Product specification
Addressable relay driver
NE/SA5090
SWITCHING CHARACTERISTICS
V
CC
=5V, T
A
=25°C, V
OUT
=5V, I
OUT
=100MA, V
IL
=0.8V, V
IH
=2.0V.
SYMBOL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
PARAMETER
Propagation delay time
Low-to-high
1
High-to-low
1
Low-to-high
2
Output
High-to-low
2
Low-to-high
3
Output
High-to-low
3
Low-to-high
4
Output
High-to-low
4
Setup time high
Setup time low
Address setup time
Hold time high
Hold time low
Chip enable pulse width
1
Chip enable
Chip enable
Chip enable
Chip enable
Chip enable
High data
Low data
Address
High data
Low data
40
50
40
10
10
40
CLR
Address
130
920
260
1850
ns
Data
130
900
260
1800
ns
Output
CE
900
130
920
1800
260
1850
ns
ns
TO
FROM
MIN
TYP
MAX
UNIT
Switching setup requirements
t
S(H)
t
S(A)
t
H(H)
t
PW(E)
ns
ns
ns
ns
NOTES:
1. See Turn-On and Turn-Off Delays, Enable-to-Output and Enable Pulse Width timing diagram.
2. See Turn-On and Turn-Off Delays, Data-to-Output timing diagram.
3. See Turn-On and Turn-Off Delays, Address-to-Output timing diagram.
4. See Turn-Off Delay, Clear-to-Output timing diagram.
5. See Setup and Hold Time, Data-to-Enable timing diagram.
6. See Setup Time, Address-to-Enable timing diagram.
FUNCTIONAL DESCRIPTION
This peripheral driver has latched outputs which hold the input date
until cleared. The NE5090 has active-Low, open-collector outputs,
all of which are cleared when power is first applied. This device is
identical to the NE590, except the outputs can withstand 28V.
The maximum die junction temperature must be limited to 165°C,
and the temperature rise above ambient and the junction
temperature are defined as:
T
R
=θ
JA
×P
D
T
J
=T
A
+t
R
where
For example, if we are using the NE5090 in a plastic package in an
application where the ambient temperature is never expected to rise
above 50°C, and the output current at the 8 outputs, when on, are
100, 40, 50, 200, 15, 30, 80, and 10mA, we find from the graph of
output voltage vs load current that the output voltages are expected
to be about 0.92, 0.75, 0.78, 1.04, 0.5, 0.7, 0.9, and 0.4V,
respectively. Total device power due to these loads is found to be
473.5mW. Adding the 200mW due to the power supply brings total
device power dissipation to 723.5mW. The thermal resistances are
83°C,per W for plastic packages and 100°C per W for Cerdips.
Using the equations above we find:
Plastic T
R
=83×0.7235=60°C
Plastic T
J
=50+60=100°C
Cerdip T
R
=100×0.7235=72.4°C
Cerdip T
J
=50+72.4=122.4°C
Thus we find that T
J
for either package is below the 165°C
maximum and either package could be used in this application. The
graphs of total load power vs ambient temperature would also give
us this same information, although interpreting the graphs would not
yield the same accuracy.
Addressable Latch Function
Any given output can be turned on or off by presenting the address
of the output to be set or cleared to the three address pins, by
holding the “D” input High to turn on the selected output, or by
holding it Low to turn off, holding the CLR input High, and bringing
the CE input Low. Once an output is turned on or off, it will remain
so until addressed again, or until all outputs are cleared by bringing
the CLR input Low while holding the CE input High.
Demultiplexer Operation
By holding the CLR and CE inputs Low and the ”D“ input High, the
addressed output will remain on and all other outputs will be off.
High Current Outputs
The obvious advantage of this device over other drivers such as the
9334 and N74LS259 is the fact that the outputs of the NE5090 are
each capable of 200mA and 28V. It must be noted, however, that the
total power dissipation would be over 2.5W if all 8 outputs were on
together and carrying 200mA each. Since the total power dissipation
is limited by the package to 1W, and since power dissipation due to
supply current is 0.25W, the total load power dissipation by the
device is limited to 0.75W at room temperature, and decreases as
ambient temperature rises.
August 31, 1994
515
Philips Semiconductors Linear Products
Product specification
Addressable relay driver
NE/SA5090
TIMING DIAGRAMS
D
t
PW
CE
t
PW
D
t
PLH
t
PLH
Q
t
PHL
Q
t
PHL
NOTE:
Other Inputs: CLR = H, A = Stable
NOTE:
Other Inputs: CE = I, CLR = H, A = Stable
Turn-On and Turn-Off Delays, Enable-to-Output
and Enable Pulse Width
Turn-On and Turn-Off Delays, Data-to-Output
A
CLR
t
PLH
t
PHL
Q
t
PLH
Q
A
NOTE:
Other Inputs: CE = L, CLR = L, D = H
Turn-On and Turn-Off Delays, Address-to-Output
Turn-Off Delays, Clear-to-Output
D
t
HH
t
HL
CE
t
SH
t
SL
A
CE
Q
NOTE:
Other Inputs: CLR = H, A = Stable
NOTE:
Other Inputs: CLR = H
Setup and Hold Time, Data-to-Enable
August 31, 1994
516
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Setup Time, Address-to-Enable
模拟与混合信号
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