®
LY62L20488A
Rev. 1.1
2048K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Description
Initial Issue
Add package “48-ball 8mm × 10mm TFBGA”
Revised
ORDERING INFORMATION
in page 11
Issue Date
Jan.09.2012
July.12.2013
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
®
LY62L20488A
Rev. 1.1
2048K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The LY62L20488A is a 16,777,216-bit low power
CMOS static random access memory organized as
2,097,152 words by 8 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The LY62L20488A is well designed for very low
power system applications, and particularly well
suited for battery back-up nonvolatile memory
application.
The LY62L20488A operates from a single power
supply of 2.7V ~ 3.6V and all inputs and outputs are
fully TTL compatible
FEATURES
Fast access time : 55/70ns
Low power consumption:
Operating current : 45/30mA (TYP.)
Standby current : 4μA (TYP.) SL-version
Single 2.7V ~ 3.6V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 1.2V (MIN.)
Green package available
Package : 44-pin 400 mil TSOP-II
48-ball 8mm x 10mm TFBGA
PRODUCT FAMILY
Product
Family
LY62L20488A
LY62L20488A(I)
Operating
Temperature
0 ~ 70℃
-40 ~ 85℃
Vcc Range
2.7 ~ 3.6V
2.7 ~ 3.6V
Speed
55/70ns
55/70ns
Power Dissipation
Standby(I
SB1,
TYP.) Operating(Icc,TYP.)
4µA(SL)
45/30mA
4µA(SL)
45/30mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Vcc
Vss
A0 – A20
DQ0 – DQ7
DECODER
2048Kx8
MEMORY ARRAY
CE#, CE2
WE#
OE#
V
CC
V
SS
NC
A0-A20
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
LY62L20488A
Rev. 1.1
2048K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
44-pin TSOP(Type II)
48-ball 8mmx10mm TFBGA
A
B
C
D
E
F
G
H
NC
NC
DQ0
OE#
NC
NC
A0
A3
A5
A1
A4
A6
A7
A2
CE#
NC
CE2
NC
DQ4
Vss DQ1 A17
Vcc DQ2
DQ3
NC
A18
NC
A20
A8
NC
A14
A12
A9
DQ5 Vcc
A16 DQ6 Vss
A15
NC
DQ7
NC
A19
A13 WE#
A10
A11
1
2
3
4
TFBGA
5
6
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
LY62L20488A
Rev. 1.1
2048K X 8 BIT LOW POWER CMOS SRAM
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
RATING
-0.5 to 4.6
-0.5 to V
CC
+0.5
0 to 70(C grade)
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
X
L
L
L
CE2
X
L
H
H
H
OE#
X
X
H
L
X
WE#
X
X
H
H
L
I/O OPERATION
High-Z
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB
,I
SB1
I
SB
,I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
®
LY62L20488A
Rev. 1.1
2048K X 8 BIT LOW POWER CMOS SRAM
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
PARAMETER
Supply Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
CC
≧
V
IN
≧
V
SS
Output Leakage
V
CC
≧
V
OUT
≧
V
SS
I
LO
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2mA
Cycle time = Min.
- 55
CE# = V
IL
and CE2 = V
IH
I
CC
I
I/O
= 0mA
- 70
Other pins at V
IL
or V
IH
Average Operating
Power supply Current
Cycle time = 1µs
CE#
≦
0.2V and CE2
≧
V
CC
-0.2V
I
CC1
I
I/O
= 0mA
Other pins at 0.2V or V
CC
-0.2V
CE# = V
IH
or CE2 = V
IL
I
SB
Other pins at V
IL
or V
IH
*5
25
℃
SL
CE#
≧
V
CC
-0.2V
Standby Power
*5
SLI
Supply Current
40
℃
or CE2
≦
0.2V
I
SB1
Other pins at 0.2V
SL
or V
CC
-0.2V
SLI
MIN.
2.7
2.2
- 0.2
-1
-1
2.2
-
-
-
TYP.
3.0
-
-
-
-
2.7
-
45
30
*4
MAX.
3.6
V
CC
+0.3
0.6
1
1
-
0.4
60
45
UNIT
V
V
V
µA
µA
V
V
mA
mA
-
8
16
mA
-
-
-
-
-
0.3
4
4
4
4
2
10
10
30
40
mA
µA
µA
µA
µA
Notes:
1. V
IH
(max) = V
CC
+ 2.0V for pulse width less than 6ns.
2. V
IL
(min) = V
SS
- 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
5. This parameter is measured at VCC = 3.0V
CAPACITANCE
(T
A
= 25
℃
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
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