Si5445BDC-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
T
A
= 25 °C, unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150 °C)
a
Pulsed Drain Current
Continuous Source Current
a
Maximum Power Dissipation
a
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
b, c
T
A
= 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= 85 °C
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
stg
- 2.1
2.5
1.3
- 55 to 150
260
- 7.1
- 5.2
± 20
- 1.1
1.3
0.7
W
°C
5s
-8
±8
- 5.2
- 3.7
A
Steady State
Unit
V
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
a
Maximum Junction-to-Foot (Drain)
t
≤
5s
Steady State
Steady State
Symbol
R
thJA
R
thJF
Typical
45
85
17
Maximum
50
95
20
°C/W
Unit
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. See Reliability Manual for profile. The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result
of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure
adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 73251
S-83054-Rev. B, 29-Dec-08
www.vishay.com
1
Si5445BDC
Vishay Siliconix
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State Resistance
a
Forward Transconductance
a
Diode Forward Voltage
a
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Reverse Recovery Charge
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
rr
Q
rr
I
F
= - 1.1 A, dI/dt = 100 A/µs
V
DD
= - 4 V, R
L
= 4
Ω
I
D
≅
- 1 A, V
GEN
= - 4.5 V, R
g
= 6
Ω
f = 1 MHz
V
DS
= - 4 V, V
GS
= - 4.5 V, I
D
= - 5.2 A
14
1.8
3.3
8
12
22
75
50
75
40
20
35
115
75
115
60
nC
ns
Ω
21
nC
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
V
SD
V
DS
= V
GS
, I
D
= - 250 µA
V
DS
= 0 V, V
GS
= ± 8 V
V
DS
= - 8 V, V
GS
= 0 V
V
DS
= - 8 V, V
GS
= 0 V, T
J
= 85 °C
V
DS
≤
- 5 V, V
GS
= - 4.5 V
V
GS
= - 4.5 V, I
D
= - 5.2 A
V
GS
= - 2.5 V, I
D
= - 4.5 A
V
GS
= - 1.8 V, I
D
= - 1.7 A
V
DS
= - 5 V, I
D
= - 5.2 A
I
S
= - 1.1 A, V
GS
= 0 V
- 20
0.027
0.035
0.050
18
- 0.8
- 1.2
0.033
0.043
0.060
S
V
Ω
- 0.45
- 1.0
± 100
-1
-5
V
nA
µA
A
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Notes:
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
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