Philips Semiconductors
Preliminary specification
Digital multi-channel audio IC (DUET)
FEATURES
Hardware features
•
Two 40 MIPS 20-bit DSP cores
•
All input and output buffer RAM is on-chip
•
Program ROM on-chip for all decoding modes
•
Two I
2
S-bus inputs with normal, double and quad speed
mode (slave only)
•
Second serial input usable for ADC (Karaoke input)
•
Three normal and double speed I
2
S-bus outputs (slave
and master from 256 and 384f
s
)
•
One normal, double, quad speed I
2
S-bus output (slave
and master from 256 and 384f
s
)
•
Japanese EIAJ serial input and output formats
•
Sony Philips Digital Interface (SPDIF) output
•
I
2
C-bus control (up to 400 kHz)
•
3.3 V supply with 5 V TTL compatible inputs/outputs
•
Boundary scan for printed-circuit board testing.
Software features
•
AC-3 up to 5.1 channels
•
MPEG 2 L2 up to 7.1 channels
•
MPEG 1 L2 (Video-CD) 2 channels at 44.1 kHz
•
Dolby pro-logic decoding at 32, 44.1 and 48 kHz
•
Output configuration for 7, 5, 4, 3, 2 and 1 channels
with or without Low Frequency Enhancement (LFE)
•
Bass redirection for small satellite loudspeakers plus
subwoofer
•
Karaoke voice mix
•
Dynamic range compression (AC-3 and MPEG)
•
Adjustable delay up to 15 ms for surround channels
(1.5 kbyte words)
•
Adjustable delay up to 5 ms for centre channel
(250 words)
•
Rounding to DAC word length
•
Mute by pin and I
2
C-bus command
•
AC-3 and MPEG bitstream information available via the
I
2
C-bus
•
Concealment of CRC errors
•
SPDIF coded output
•
Fully programmable SPDIF channel status information.
APPLICATIONS
SAA2505H
The SAA2505H is intended for all markets where a
multi-channel audio decoder for Dolby AC-3 and MPEG 2
is required.
Primary markets are for DVD video players, TV sets and
audio/video amplifiers.
GENERAL
The SAA2505H decodes multi-channel audio up to
MPEG 7.1, AC-3 5.1 and pro-logic on a dual DSP core.
The device contains all of the RAM and ROM necessary
for operation. This minimises the need for external
components and no microcode download is required.
The device is primarily intended for audio/video surround
sound amplifiers where the amplifier is connected to the
data source by means of SPDIF (IEC 60958). The input
interface is, therefore, made for SPDIF (IEC 60958) and
formatted for the I
2
S-bus.
The primary device output is PCM, sent via four I
2
S-bus
ports. There is also a SPDIF (IEC 60958) formatted
output.
User control is achieved via an I
2
C-bus. However, the
SAA2505H is capable of stand-alone operation.
1998 Mar 10
2
Philips Semiconductors
Preliminary specification
Digital multi-channel audio IC (DUET)
PINNING
SYMBOL
STANDALONE
EFO1
EFO2
EFO3
EFO4
EFO5
EFO6
V
SSDI
V
DDDI
EFI1
EFI2
EFI3
V
DDDE
WSO
SCK
V
SSDE
SDO0
SDO1
V
DDDE
V
SSDI
V
DDDI
V
SSDI
V
DDDI
V
DDDI
V
SSDI
V
DDDE
SDO2
SDO3
V
SSDE
WSO3
SCKO3
V
DDDE
SDB
SPDIF
V
SSDE
V
SSDI
V
DDDI
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
DRIVE/
LOAD
(1)
A
F
F
F
F
F
F
−
−
A
A
A
−
G
G
−
F
F
−
−
−
−
−
−
−
−
F
F
−
F
F
−
F
F
−
−
−
TYPE
I
O
O
O
O
O
O
S
S
I
I
I
S
I/O
I/O
S
O
O
S
S
S
S
S
S
S
S
O
O
S
O
O
S
O
O
S
S
S
DESCRIPTION
select stand-alone mode input
output flag FO1; from DSP2
output flag FO2; from DSP2
output flag FO3; from DSP2
output flag FO4; from DSP1
output flag FO5; from DSP1
output flag FO6; from DSP1
digital ground for internal logic and memories; note 2
SAA2505H
digital supply voltage for internal logic and memories (+3.3 V); note 3
input flag FI1; to DSP2
input flag FI2; to DSP1
input flag FI3; to DSP1
digital supply voltage for I/O cells (+3.3 V); note 4
word select input/output for ports 0 to 2; also used for output port 3
when not in quad mode (I
2
S-bus)
serial clock input/output for ports 0 to 2; also used for output port 3
when not in quad mode (I
2
S-bus)
digital ground for I/O cells; note 5
serial data output for port 0 (I
2
S-bus)
serial data output for port 1 (I
2
S-bus)
digital supply voltage for I/O cells (+3.3 V); note 4
digital ground for internal logic and memories; note 2
digital supply voltage for internal logic and memories (+3.3 V); note 3
digital ground for internal logic and memories; note 2
digital supply voltage for internal logic and memories (+3.3 V); note 3
digital supply voltage for internal logic and memories (+3.3 V); note 3
digital ground for internal logic and memories; note 2
digital supply voltage for I/O cells (+3.3 V); note 4
serial data output for port 2 (I
2
S-bus)
serial data output for port 3 (I
2
S-bus)
digital ground for I/O cells; note 5
word select output for port 3; used in quad mode (I
2
S-bus)
serial clock output for port 3; used in quad mode (I
2
S-bus)
digital supply voltage for I/O cells (+3.3 V); note 4
serial data begin output for port 3; used in quad mode (I
2
S-bus)
SPDIF output
digital ground for I/O cells; note 5
digital ground for internal logic and memories; note 2
digital supply voltage for internal logic and memories (+3.3 V); note 3
1998 Mar 10
5
微控制器 MCU
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