Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
FEATURES
The following features apply to both SAA5264 and
SAA5265:
•
Complete 625 line teletext decoder in one chip reduces
printed circuit board area and cost
•
Automatic detection of transmitted fastext links or
service information (packet 8/30)
•
On-Screen Display (OSD) for user interface menus
using teletext and dedicated menu icons
•
Video Programming System (VPS) decoding
•
Wide Screen Signalling (WSS) decoding
•
Pan-European, Cyrillic, Greek/Turkish and
French/Arabic character sets in each chip
•
High-level command interface via I
2
C-bus gives easy
control with a low software overhead
•
High-level command interface is backward compatible
to Stand-Alone Fastext And Remote Interface (SAFARI)
•
625 and 525 line display
•
RGB interface to standard colour decoder ICs, current
source
•
Versatile 8-bit open-drain Input/Output (I/O) expander,
5 V tolerant
•
Single 12 MHz crystal oscillator
•
3.3 V supply voltage.
SAA5264 features
•
Automatic detection of transmitted pages to be selected
by page up and page down
•
8 Page fastext decoder
•
Table Of Pages (TOP) decoder with Basic Top Table
(BTT) and Additional Information Tables (AITs)
•
4 Page user-defined list mode.
SAA5264; SAA5265
GENERAL DESCRIPTION
The SAA5264 is a single-chip ten page 625-line World
System Teletext decoder with a high-level command
interface, and is SAFARI compatible.
The SAA5265 is a single-chip one page version of the
SAA5264.
Both devices are designed to minimize the overall system
cost, due to the high-level command interface offering the
benefit of a low software overhead in the TV
microcontroller.
The SAA5264 has the following functionality:
•
10 page teletext decoder with OSD, Fastext, TOP,
default and list acquisition modes
•
Automatic channel installation support
•
Closed caption acquisition and display
•
Violence Chip (VChip) support.
The SAA5265 has the following functionality:
•
1 Page teletext decoder with OSD, fastext and default
acquisition modes
•
Automatic channel installation support
•
Closed caption acquisition and display
•
VChip support
•
No EEPROM fitted (there is no list mode feature).
2000 Jan 27
2
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
PINNING
SYMBOL
PIN
TYPE
DESCRIPTION
SAA5264; SAA5265
Port 2: 8-bit programmable bidirectional port with alternative functions
P2.0/PWM
P2.1/PWM0
P2.2/PWM1
P2.3/PWM2
P2.4/PWM3
P2.5/PWM4
P2.6/PWM5
P2.7/PWM6
1
2
3
4
5
6
7
8
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
output for 14-bit high precision Pulse Width Modulator (PWM)
outputs for 6-bit PWMs 0 to 6
Port 3: 8-bit programmable bidirectional port with alternative functions
P3.0/ADC0
P3.1/ADC1
P3.2/ADC2
P3.3/ADC3
P3.4/PWM7
V
SSC
SCL(NVRAM)
SDA(NVRAM)
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
V
SSA
CVBS0
CVBS1
SYNC_FILTER
IREF
FRAME
TEST
COR
9
10
11
12
30
13
I/O
I/O
I/O
I/O
I/O
−
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
−
I
I
I
I
O
I
O
I/O
−
O
input/output for general use
analog ground
Composite Video Baseband Signal (CVBS) input; a positive-going 1 V
(peak-to-peak) input is required; connected via a 100 nF capacitor
sync-pulse-filter input for CVBS; this pin should be connected to V
SSA
via a
100 nF capacitor
reference current input for analog circuits; for correct operation a 24 kΩ resistor
should be connected to V
SSA
Frame de-interlace output synchronized with the VSYNC pulse to produce a
non-interlaced display by adjustment of the vertical deflection circuits
not available; connect this pin to V
SSA
contrast reduction: open-drain, active LOW output which allows selective contrast
reduction of the TV picture to enhance a mixed mode display
P3.4/PWM7 (described above)
analog supply voltage (3.3 V)
Blue colour information pixel rate output
5
output for 6-bit PWM7
core ground
I
2
C-bus Serial Clock input to Non-Volatile RAM
I
2
C-bus Serial Data input/output (Non-Volatile RAM)
input/output for general use
input/output for general use
input/output for general use
8 mA current sinking capability for direct drive of Light Emitting Diodes (LEDs)
inputs for the software Analog-to-Digital-Converter (ADC) facility
Port 0: 8-bit programmable bidirectional port
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V
DDA
B
2000 Jan 27
31
32
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
