Philips Semiconductors
Preliminary specification
All Compact Disc Engine (ACE)
CONTENTS
1
2
3
4
5
6
7
7.1
7.1.1
7.1.2
7.2
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.4
7.5
7.5.1
7.6
7.7
7.7.1
7.8
7.8.1
7.9
7.10
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.1.7
8.1.8
8.1.9
8.1.10
8.1.11
8.1.12
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
QUICK REFERENCE DATA
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
Analog front-end
Decoder front-end
Servo front end
Decoder functions
Servo functions
Signal conditioning
Focus control
Radial control
Off-track counting
Off-track detection
Shock detection
Defect detection
Driver interface
Laser interface
Subcode interface
Digital output
Format
S2B interface
Audio support
Serial audio data interface
CD-ROM support
Serial CD-ROM data interface
Reset
External ROM support
MICROCONTROLLER INTERFACE
Microcontroller applications registers
CLK generate register (CLKgen)
Port Servo Register (PSR)
Servo Control Register (SCR)
Servo Status Register (STR)
Motor Output QCLV Register (MOQ; address
0XF2H and 0XF3H)
P3 Register
Decoder Status Register (DSR)
Motor Setpoint Register (MSR; address
0XF9H)
Motor Gain QCLV Register (address 0XFAH)
Data Direction Registers (DDR0, DDR2 and
DDR3)
Configuration Control Register (CCR)
A second serial interface
2
8.1.13
8.1.14
8.1.15
8.2
8.3
8.4
8.4.1
9
10
10.1
10.2
10.3
11
12
12.1
12.2
12.3
12.4
13
14
SAA7348GP
Memory map access to the servo
PLL Registers
DIV17 Register (address 0X9FH)
Memory map
Summary of the functions controlled by
decoder registers 0 to F
Summary of servo commands
Summary of servo command parameters
LIMITING VALUES
CHARACTERISTICS
General characteristics
Subcode interface timing characteristics
I
2
S timing characteristics
PACKAGE OUTLINE
SOLDERING
Introduction
Reflow soldering
Wave soldering
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
1997 Jul 11
Philips Semiconductors
Preliminary specification
All Compact Disc Engine (ACE)
1
FEATURES
SAA7348GP
•
Improved playability on ABEX TCD-721R, TCD-725 and
TCD-714 discs
•
Automatic closed loop gain control available for focus
and radial loops
•
On chip clock multiplier allows the use of 8.4672 MHz
crystal
•
S2B serial interface with host controller
•
Double speed servo
•
Integrated engine controller (high speed embedded
80C51)
•
External program support.
2
GENERAL DESCRIPTION
•
Focus servo loop
•
Radial servo loop
•
Built-in access procedure with fast track count
possibilities
•
Sledge motor servo loop with pulsed sledge support
•
High speed error correction, up to sixteen times
over-speed
•
Supports three different over-speed ranges with only
one external crystal
•
Lock-to-disc mode
•
Full turntable motor control
•
Full error correction strategy, t = 2 and e = 4
•
All standard decoder functions implemented digitally
•
Adaptive digital HF equalizer
•
FIFO overflow concealment for rotational shock
resistance
•
Digital audio interface (EBU), audio and data
•
2 and 4 times oversampling integrated digital filter,
including f
s
mode
•
Audio data peak level detection
•
Kill interface for DAC deactivation during digital silence
•
All TDA1301 (DSIC2) digital servo functions
•
Low focus noise
3
ORDERING INFORMATION
The SAA7348 All Compact Disc Engine (ACE) combines
the functionality of a CD decoder (LO9585), a digital servo
(OQ8868) and a microcontroller core (80C51 based) on a
single chip. It was developed for high speed CD-ROM
applications but, due to the large scale integration, can
also be used in other CD applications. The internal
microcontroller makes it possible to develop other
applications quickly. The microcontroller can operate with
internal or external ROM.
Additional features include:
•
High level integration
•
Improved communication speed.
PACKAG0E
TYPE NUMBER
NAME
SAA7348GP
DESCRIPTION
VERSION
SOT407-1
LQFP100 plastic low profile quad flat package; 100 leads; body 14
×
14
×
1.4 mm
1997 Jul 11
3
Philips Semiconductors
Preliminary specification
All Compact Disc Engine (ACE)
4
QUICK REFERENCE DATA
SYMBOL
V
DDD(pads)
V
DDD(core)
V
DDA
I
DD
f
xtal
T
amb
T
stg
Note
PARAMETER
digital supply voltage for pad cells
digital supply voltage for the core
analog supply voltage
supply current
crystal frequency
operating ambient temperature
storage temperature
note 1
note 1
n = 8 mode
CONDITIONS
MIN.
4.5
3.0
3.0
−
8
0
−55
SAA7348GP
TYP.
5.0
3.3
3.3
90
8.4672
−
−
MAX.
5.5
3.6
3.6
−
35
70
+125
UNIT
V
V
V
mA
MHz
°C
°C
1. The analog and digital core supply pins (V
DDA
and V
DDD(core)
) must be connected to the same external supply.
The core and pads can operate at different voltages and should never be connected together directly.
1997 Jul 11
4
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