INTEGRATED CIRCUITS
DATA SHEET
SAA7360
Bitstream conversion ADC
for digital audio systems
Product specification
Supersedes data of July 1993
File under Integrated Circuits, IC01
1995 Apr 24
Philips Semiconductors
Philips Semiconductors
Product specification
Bitstream conversion ADC
for digital audio systems
FEATURES
•
Stereo input
•
Single-ended input
•
Uncommitted input buffer for filtering and pre-scaling
•
Fully differential analog-to-digital converter (ADC) using
3rd order Sigma-Delta modulation
•
128 times oversampling
•
Four stage digital decimation filter
•
Switchable high-pass filter to remove DC offsets
•
16-bit or 18-bit selectable output in a multiple of formats
•
Sampling rates between 18 and 53 kHz supported
•
Master or slave operation
•
Choice of 2 crystal frequencies
•
Single power supply operation (+5 V).
QUICK REFERENCE DATA
SYMBOL
V
DD
f
xtal
THD + N
PARAMETER
supply voltage
crystal frequency
total harmonic distortion + noise
256f
s
512f
s
CONDITIONS
−
−
−
MIN.
4.5
TYP.
5.0
11.2896
22.5792
−90
GENERAL DESCRIPTION
SAA7360
The SAA7360 is a CMOS ADC using Philips bitstream
conversion technique. The device is designed for digital
audio playback systems, such as digital amplifiers,
CD-recordable and Digital Compact Cassette (DCC). The
device is a complementary device to the SAA7350
bitstream conversion digital-to-analog converter (DAC).
MAX.
5.5
−
−
−85
UNIT
V
MHz
MHz
dB
ORDERING INFORMATION
TYPE
NUMBER
SAA7360GP
Note
1. When using IR reflow soldering it is recommended that the Drypack instructions in the
“Quality Reference
Pocketbook”
(order number 9398 510 34011) are followed.
PACKAGE
NAME
QFP44
(1)
DESCRIPTION
plastic quad flat package; 44 leads (lead length 2.35 mm);
body 14
×
14
×
2.2 mm
VERSION
SOT205-1
1995 Apr 24
2
Product specification
SAA7360
Fig.1 Block diagram.
handbook, full pagewidth
1995 Apr 24
BBOL
34
18
6
7
8
9
32
33
16
NINL
PINL
DIOL
DCKO
XIN
XOUT
XSYS1
XSYS2
SDM
FSEL
128f s
40
MUX
39
42
41
fs
HIGH-
PASS
FILTER
OUTPUT
INTER-
FACE
14
11
12
13
MUX
128f s
44
SDM
10
8f s
WSEL
TSEL
ODF1
ODF2
SWSO
SCKO
SDO
SWSI
SCKI
TIMING
AND
CONTROL
1
BLOCK DIAGRAM
Philips Semiconductors
BAOL
31
BAIL
30
V refL
V refL
Bitstream conversion ADC
for digital audio systems
VDACN
27
VDACP
29
20
VDDAT
VSSAT
1st
DECIMATION
FILTER
STAGE
2nd
DECIMATION
FILTER
STAGE
19
TIMING
V refL
35
V refR
21
V ref
3
SAA7360
22
15
24
23
17
38
2
5
4
BBOR
NINR
DSEL
DIOR
PINR
HPEN TEST1 VDDD VSSD
I ref
28
I ref
BAIR
26
CEN
43
3
RESET
TEST2
V refR
V refR
V SSA
37
VDDA
36
25
BAOR
MLA714 - 1
Philips Semiconductors
Product specification
Bitstream conversion ADC
for digital audio systems
PINNING
SYMBOL
FSEL
PIN
1
DESCRIPTION
SAA7360
Crystal frequency select input. This pin is used to select the master crystal frequency as
follows: FSEL = HIGH = 256f
s
; FSEL = LOW = 512f
s
; if unconnected the pin will default
HIGH.
test input 1; this pin should be left open-circuit
test input 2; this pin should be left open-circuit
supply ground for the digital section
supply voltage for the digital section (+5 V)
crystal oscillator input
crystal oscillator output
system clock output
output clock at a frequency half the system clock frequency
serial interface clock input
serial interface clock output
serial interface data output
serial interface word select input
serial interface word select output
input for selecting between the internally generated 1-bit code (DSEL = HIGH) or an
externally generated 1-bit code (DSEL = LOW); if unconnected this pin defaults HIGH
1-bit code clock output
1-bit code input/output (right channel)
1-bit code input/output (left channel)
supply ground for the analog timing section
supply voltage for the analog timing section (+5 V)
voltage reference generator for the right channel analog section
output of right channel buffer operational amplifier ‘B’
positive input to right channel Sigma-Delta modulator
negative input to right channel Sigma-Delta modulator
output of right channel buffer operational amplifier ‘A’
input of right channel buffer operational amplifier ‘A’
negative voltage reference level input for the DACs
current reference output
positive voltage reference level input for the DACs
input of left channel buffer operational amplifier ‘A’
output of left channel buffer operational amplifier ‘A’
negative input to left channel Sigma-Delta modulator
positive input to left channel Sigma-Delta modulator
output of left channel buffer operational amplifier ‘B’
voltage reference generator for the left channel analog section
supply voltage for the analog section (+5 V)
supply ground for the analog section
TEST1
TEST2
V
SSD
V
DDD
XIN
XOUT
XSYS1
XSYS2
SCKI
SCKO
SDO
SWSI
SWSO
DSEL
DCKO
DIOR
DIOL
V
SSAT
V
DDAT
V
refR
BBOR
PINR
NINR
BAOR
BAIR
V
DACN
I
ref
V
DACP
BAIL
BAOL
NINL
PINL
BBOL
V
refL
V
DDA
V
SSA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
1995 Apr 24
4
Philips Semiconductors
Product specification
Bitstream conversion ADC
for digital audio systems
SYMBOL
HPEN
TSEL
WSEL
ODF2 and
ODF1
RESET
CEN
PIN
38
39
40
DESCRIPTION
SAA7360
high-pass filter enable input (HPEN = HIGH = enabled); if unconnected this pin defaults
HIGH
input to select master (TSEL = LOW) or slave (TSEL = HIGH) operation of the serial
interface; if unconnected this pin defaults HIGH
input to indicate 16-bit (WSEL = HIGH) or 18-bit (WSEL = LOW) output data word length of
the serial interface; if unconnected this pin defaults HIGH
41 and 42 serial interface format inputs; these 2 pins determine the interface format in which the device
will operate (see Chapter “Functional Description”); if unconnected these pins will default
HIGH (I
2
S format)
43
44
Power-On Reset (POR) input (active LOW) to mute the digital output during power on
Chip enable input; this pin, when LOW, disables the operation of the device and 3-states the
outputs of the serial interface bus. This enables the connection of one of more devices to the
output bus; if unconnected this pin defaults HIGH.
40 WSEL
37 VSSA
36 VDDA
38 HPEN
41 ODF2
43
42
39 TSEL
44 CEN
35
FSEL
TEST1
TEST2
VSSD
VDDD
XIN
XOUT
XSYS1
XSYS2
1
2
3
4
5
6
7
8
9
34
BBOL
ODF1
V refL
handbook, full pagewidth
RESET
33 PINL
32 NINL
31 BAOL
30 BAIL
29 V DACP
SAA7360
28
I ref
27 VDACN
26 BAIR
25 BAOR
24 NINR
23 PINR
MLA715 - 2
SCKI 10
SCKO 11
SWSI 13
SWSO 14
DSEL 15
DCKO 16
VSSAT 19
VDDAT 20
V refR 21
SDO 12
DIOR 17
DIOL 18
Fig.2 Pin configuration.
1995 Apr 24
5
BBOR 22
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