AN827
APPLICATION NOTE
A 500W HIGH POWER FACTOR WITH THE L4981A
CONTINUOUS MODE IC
The widespread use of passive AC/DC off-line converters causes low power factor and high line current
harmonic distortion. To reduce these phenomena and to comply with relevant regulatory agency require-
ments , designers are employing active power factor correction in their off-line SMPS applications. This
paper describes a practical, low cost and easy to implement 500W power factor corrected application
that employs the L4981A Continuous Mode PFC IC.
INTRODUCTION
Reduction of line current harmonic distortion and improvement of power factor is of great concern to many de-
signers of off-line switched mode power supplies. This concern has been motivated by present and impending
regulatory requirements regarding line current harmonics. The reasons for improving power factor and reducing
line current harmonic distortion are well known and understood. Active power factor correction using the boost
topology and operating in the continuous inductor current control mode is an excellent method to comply with
these requirements and is well accepted in the industry.
This paper will present a practical power factor corrected design for a 500 Watt output and universal mains input
application. The detailed derivations of all power, IC biasing and control component values and types will be
shown. The evaluation results from an actual working demoboard will be presented as well as several relevant
oscillograms.
DESIGN SPECIFICATIONS
The design specifications given below are realized by the implementation of a functional demoboard.
The design target specifications are as follows:
– Universal mains input AC voltage V
irms
= 88Vac to 264Vac, 60/50Hz
– DC regulated output voltage V
out
= 400Vdc
– Full load output ripple voltage
∆V
ripple
= ±8V
– Rated output power P
out
= 500W
– Maximum output overvoltage V
omax
= 450V
– Switching frequency f
sw
= 80kHz
– Maximum inductor current ripple
∆I
L
= 23%
– Input power factor PF > 0.99
– Input line current total harmonic distortion <5%
To meet these specifications, the selection of component values and material types is very important. The next
sections will describe the component selection criteria along with some critical derivations. For detailed expla-
nations on the controller operation and pin description, refer to Application
Note AN628
Designing A High Power Factor Switching Preregulator With The L4981 Continuous Mode [1]
and
the corresponding Datasheet
L4981A/B Power Factor Corrector [2].
November 2003
1/20
AN827 APPLICATION NOTE
POWER COMPONENTS SELECTION
The power component values and types are derived and selected in the next section. Please refer to Figure 2,
500 Watt Demoboard Schematic.
Input Diode Bridge
The input diode bridge, D1, can be a standard slow-recovery type. The selection criteria include the maximum
peak reverse breakdown voltage, maximum forward average current, maximum surge current and thermal con-
siderations.
Maximum peak reverse voltage:
V
prv
=
V
irmsmax
⋅
2
⋅
1.2
(
safety m arg in
)
=
264V
⋅
2
⋅
1.2
=
448V
Therefore use a 600V rated diode.
Maximum forward average current:
P
O UT
500
-
-
I
rms max
= ---------------------------- = ------------------ =
6.31A
V
rms min
⋅
n
88
⋅
0.9
I
rms max
⋅
2
6.31
⋅
2
I
f ave
= ------------------------------- = ---------------------- =
2.84A
-
-
π
π
The thermal considerations require the I
fave
rating to be significantly higher than the value calculated. The part
chosen has a I
fave
of 25A. Additionally, a small heatsink is required to keep the case temperature within speci-
fication.
Maximum surge current:
There is a significant inrush current at start-up due to the large value bulk capacitor, C6, at the output. There is
minimal impedance from the mains to this capacitor, thus at the peak of the input voltage waveform a large in-
rush current exists. This inrush current can be significantly reduced by some means of current limiting such as
an NTC or triac/resistor combination. The input bridge diode’s maximum surge current rating must not be ex-
ceeded. This demoboard has a low cost and simple NTC for current inrush limiting. The efficiency can be im-
proved by using the triac/resistor scheme, however the cost and complexity increases.
Input Fuse
The input fuse, F1, must open during severe current overloads without tripping during the transient inrush cur-
rent condition or during normal operation. The fuse must have a current rating above the maximum continuous
current (6.3Arms) that occurs at the low line voltage (88V). The fuse chosen for this demoboard has a continu-
ous current rating of 10A/250VAC.
Input Filter Capacitor
The input filter capacitor, C3, is placed across the diode bridge output. This capacitor must smooth the high fre-
quency ripple and must sustain the maximum instantaneous input voltage. In a typical application an EMI filter
will be placed between the mains and the PFC circuit. This demoboard does not have the EMI filter except for
2/20
AN827 APPLICATION NOTE
this input capacitor. However, the evaluation results listed in Table 1 were made with an EMI filter placed be-
tween the mains input and the PFC circuit. The design of the EMI filter is not described here. The value of the
input filter capacitor can be calculated as follows:
I
rms
Cin
>
Kr
----------------------------------------------------------
2
⋅ π ⋅
f
S w
⋅
r
⋅
V
rm s min
6.31
Cin
>
0.25
⋅
---------------------------------------------------- =
0.59µF
-
2
⋅ π ⋅
80k
⋅
0.06
⋅
88
Where:
Kr is the current ripple coefficient r = 0.02 to 0.08
The maximum value of this capacitor is limited to avoid line current distortion. The value chosen for this demo-
board is 0.68µF.
Output Bulk Capacitor
The choice of the output bulk capacitor, C6, depends on the electrical parameters that affect the filter perfor-
mance and also on the subsequent application.
Capacitance Value:
The value shall be chosen to limit the output voltage ripple according to the following formula:
Assume low ESR and
∆V
ripple
= ±8V
P
out
P
out
C
out
= --------------------------------------------- = ------------------------------------------- =
207µF
-
2π
⋅
2f
⋅ ∆V
O
⋅
V
O
2π
⋅
120
⋅
8
⋅
400
The value chosen is 330uf to ensure that the maximum specified voltage ripple is not exceeded.
Although the ESR does not normally affect the voltage ripple, it has to be considered for the power losses due
to the line and switching frequency ripple currents. It is important to verify that the low and high frequency ripple
currents do not exceed the manufacturer’s specified ratings at the operating case temperature. Capacitors may
be connected in parallel to decrease the equivalent ESR and to increase the ripple current handling capability.
If a specific hold-up time is required, that is the capacitor has to deliver the supply voltage for a specified time
and for a specified dropout voltage, then the capacitor value will be determined by the following equation:
2
⋅
P
out
⋅
t
hold
C
out
= ----------------------------------------------
2
2
V
o min
–
V
op min
Where:
P
out
V
omin
V
opmin
t
hold
is the maximum output power
is the minimum output voltage at max. load
is the minimum operating voltage before "power fail" detection
is the required hold-up time
Voltage Rating:
The capacitor output voltage rating should not be exceeded under worst case conditions. The minimum voltage
rating is calculated as follows:
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AN827 APPLICATION NOTE
V
cap
> V
out
+
∆V
ripple
+ V
margin
= 400 + 8 + 40 = 448V
Where: V
out
is the nominal regulated DC output voltage
∆V
ripple
is the ac voltage superimposed on the regulated DC output voltage
∆V
margin
is the allowance for tolerances in V
out
and additional margin before OVP intervention
The capacitor chosen has a voltage rating of 450VDC. The overvoltage trip level of Pin 3 (OVP) must be set
below 450VDC.
Power Mosfet
The power mosfet, Q1, is used as the active switch due to its high frequency capability, ability to be driven di-
rectly from the controller and availability. The main criteria for its selection include the drain to source breakdown
voltage (BVdss), delivered power and temperature considerations.
Voltage Rating:
The power mosfet has to sustain the maximum boosted output dc voltage according to the following equation:
BV
dss
> V
out
+
∆V
ripple
+ V
margin
= 400 + 8 + 40 = 448V
The power mosfet chosen has a BV
dss
of 500V.
Power Rating:
The main parameters to consider are Rdson and the thermal characteristics of the package and heatsink. The
main losses in the power mosfet are the conduction and switching losses. The switching losses can be sepa-
rated into two quantities, capacitive and crossover losses. The switching losses are dependent on the mosfet
current di/dt. The maximum conduction (on-state) power losses can be calculated according to the following
equations:
I
Q msm ax
500
---------
-
16
⋅
2
⋅
V
irms min
P
out
0.9
16
⋅
2
⋅
88
= -----------------------------------------
⋅
2
– ----------------------------------------------- = -----------------
⋅
2
– -----------------------------
-
3π
⋅
400
3π
⋅
V
out
2
⋅
88
η ⋅
2 V
irms min
I
Qrmsmax
= 5.42A
P
onmax
= I
Qrms 2
max · R
(DS)on max
= 5.42
2
· 0.54 = 15.86W
Where:
I
Qrms
max is the max. power mosfet rms current
V
irms
min is the min. specified rms input voltage
R
(DS)
on typ. = 0.27Ω at 25°C at 10A, V
GS
= 10V
R(
DS)
on max = 0.54Ω at 100°C
The capacitive switching losses at turn-on are calculated as follows:
P
capac i tan c e
=
3.3
⋅
C
oss
⋅
V
out
1.5
2
1
-
+ --
C
ex t
⋅
V
o ut
⋅
f
s w
=
2W
2
4/20
AN827 APPLICATION NOTE
Where:
C
oss
= 650pF is the mosfet drain capacitance at 25V
C
ext
= 100pF is the equivalent stray capacitance of the layout and external parts
The estimated crossover switching losses (turnon and turn-off) are calculated as follows:
P
crossover
= V
out
· I
Qrms
· f
sw
· t
cr
+ Prec = 400 · 5.42 · 80k · 40ns + 1.5 = 8.43W
Where:
t
cr
is the crossover time
P
rec
is the boost diode recovery power loss contribution
To reduce the turn-off losses in the mosfet, an RCD turn-off snubber has been employed. The capacitor value
is calculated as follows:
I
Q1pk
⋅
t
rise
8.92
⋅
40ns
C11
= ---------------------------- = ----------------------------- =
892pF
-
-
∆V
o ut
400
Therefore, use C11 = 820pF, 1000VDC rating
The resistors, R23-24, must dissipate the energy stored in the snubber capacitor upon turn-on of the power
mosfet. The capacitor must fully discharge during the switching cycle.
The time constant of the RC combination is determined as follows:
1
1
-
R
≤
------
⋅
----------------------- =
1524
10 f
sw
⋅
C11
The power dissipated in the resistors, R23-24, is calculated as follows:
2
1
1
2
P
dis s
= --
C11
⋅
V
out
⋅
f
s w
= --
⋅
820pF
⋅
400
⋅
80k
=
5.25W
-
-
2
2
Therefore, use R23 = R24 = 510Ω, 3W rating.
The power mosfet chosen is the STMicoelectonics Part Number STW20NA50.
This part has a BV
dss
= 500V, R
DSon
= 0.27Ω, and is in a TO-247 package. In order to keep the junction tem-
perature at a safe level, the mosfet is attached to an AAVID Heatsink Part Number 61085 with a thermal resis-
tance of 3.0°C/W. This will keep the mosfet junction temperature at a safe level at worst case conditions, low-
line input voltage (88V) and full load (500W).
The thermal resistance of the heatsink may need to decrease depending upon the ambient temperature, type
of enclosure (vented or non-vented) and the method of cooling (natural or forced convection).
Boost Diode
The main criteria for the selection of the boost diode, D2, include the repetitive peak reverse breakdown voltage
(V
rrm
), average forward current (I
fave
), reverse recovery time (t
rr
) and thermal considerations.
Voltage Rating:
The voltage rating of the boost diode is determined by the same equation as for the power mosfet. The value
chosen is V
rrm
= 600V.
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