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PT7M6832-6840
Ultra Low Voltage Detectors
Features
Factory-Set Reset Threshold Voltages for Nominal
Supplies from 1.2V to 1.8V
Low power consumption : Typ 7.5μA
Five different timeout periods available: 70μs(voltage
detector), 1.5ms, 30ms, 210ms and 1.68s
Output configuration: Push-pull RESET , push-pull
RESET or open-drain RESET
Guaranteed reset valid to Vcc: 0.9V--active low,
0.85V--active high
Detect voltage accuracy:
1.5%
Adjustable threshold reset-in option
Immune to short negative Vcc transients
Small SOT23-3L, SC70-3L or SOT143-4L packages
Description
The PT7M6832–6840 are microprocessor (µ
P)
supervisory circuits used to monitor low-voltage power
supplies in µ and digital systems. They provide
P
excellent circuit reliability and low cost by eliminating
external components and adjustments when used with
+1.2V to +1.8V powered circuits.
These devices assert a reset signal whenever the VCC
supply voltage declines below a preset threshold or
whenever manual reset (MR) is asserted. Reset remains
asserted for a fixed timeout delay after VCC has risen
above the reset threshold or when manual reset is
deasserted. Five different timeout periods are available:
70µ (voltage detector), 1.5ms, 30ms, 210ms, and 1.68s.
s
Reset thresholds suitable for operation with a variety of
supply voltages are available.
The PT7M6832/PT7M6835/PT7M6838 have a push-
pull active-low reset output (RESET). The PT7M6833/
PT7M6836/PT7M6839 have a push-pull active-high
reset output (RESET) and the PT7M 6834/ PT7M 6837/
PT7M 6840 have an open-drain active-low reset output
(RESET). The open-drain active-low reset output
requires a pull-up resistor that can be connected to a
voltage higher than VCC.
The PT7M6835/PT7M6836/PT7M6837 feature a
debounced manual reset input (MR), while the
PT7M6838/PT7M6839/PT7M6840 provide a RESET-
IN input allowing the user to externally adjust the reset
threshold. The reset comparator is designed to ignore
fast transients on VCC.
Low supply current of 7.5µ makes the PT7M6832–
A
PT7M6840 ideal for use in portable equipment. These
devices are available in 3-pin SOT23 or 4-pin SOT143
packages.
Pad Configuration
PT7M6832
PT7M6833
PT7M6834
1
GND
1
PT7M6832
PT7M6833
PT7M6834
GND
VCC
3
VCC
3
2
RESET (RESET)
2
RESET (RESET)
SOT23-3L
() is for PT7M6833
SC70-3L
() is for PT7M6833
PT7M6835
PT7M6836
PT7M6837
1
GND
RESET
(RESET)
4
1
PT7M6838
PT7M6839
PT7M6840
GND
RESET
(RESET)
4
Applications
Computers
Controllers
Intelligent Instruments
Critical μP and μC Power Monitoring
Portable/Battery-Powered Equipment
2
VCC
MR
3
2
VCC
RESET-IN
3
SOT143-4L
() is for PT7M6836
SOT143-4L
() is for PT7M6839
2013-11-0003
1
PT0236-6
11/18/13
PT7M6832-6840
Ultra Low Voltage Detectors
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Pin Description
PT7M6832- PT7M6837
PT7M6833
SOT23-3
SC70-3
1
PT7M6832/
PT7M6834
SOT23-3
SC70-3
1
PT7M6836
1
PT7M6835/
PT7M6837
1
Name
GND
Description
Ground
Reset Output, Open-Drain or Push-Pull, Active-Low.
/RESET changes from HIGH to LOW when Vcc
drops below the selected reset threshold or /MR is
pulled low. /RESET remains LOW for the reset
timeout period after Vcc exceeds the device reset
threshold and /MR is released high.
Reset Output, Push-Pull, Active-High. RESET
changes from LOW to HIGH when the Vcc input
drops below the selected reset threshold or /MR is
pulled low. RESET remains HIGH for the reset
timeout period after Vcc exceeds the device reset
threshold and /MR is released high.
Active-Low
Manual Reset Input. Internal 20kΩ pull-
up to Vcc. Pull LOW to force a reset. Reset remains
active as long as MR is LOW and for the reset timeout
period after MR goes HIGH. Leave unconnected or
connect to Vcc if unused
Supply Voltage and Monitored Supply
-
2
-
4
RESET
2
-
4
-
RESET
-
-
3
3
MR
3
3
2
2
VCC
PT7M6838- PT7M6840
PT7M6839
PT7M6838/
PT7M6840
3
2
1
-
Name
Description
Adjustable Reset Threshold Input. High-impedance input for reset comparator.
Connect this pin to an external resistive-divider network to set the reset threshold
voltage; the typical threshold is 0.44V. Reset is asserted when RESET-IN is below
the threshold (VCC is not monitored).
Supply Voltage (1.3V to 5.5V)
Ground
Reset Output, Push-Pull, Active-High. RESET changes from LOW to HIGH when
the RESET-IN input drops below the typical reset threshold (0.44V). RESET
remains HIGH for the reset timeout period after RESET-IN exceeds the reset
threshold.
Reset Output, Open-Drain or Push-Pull, Active-Low. /RESET changes from HIGH
to LOW when RESET-IN drops below the typical reset threshold (0.44V). /RESET
remains LOW for the reset timeout period after RESET-IN exceeds the reset
threshold.
3
2
1
4
RESET-IN
Vcc
GND
RESET
-
4
RESET
2013-11-0003
2
PT0236-6
11/18/13
PT7M6832-6840
Ultra Low Voltage Detectors
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Block Diagram
MR (only for PT7M6835/6836/6837)
V
CC
Manual
Reset
Detect
+
-
Reset
Timeout
Period
Reset
Output
RESET /
(RESET)
+
-
V
REF
=444mV
Fig.1
PT7M6832-PT7M6837 Block Diagram
Fig.2
PT7M6838-PT7M6840 Block Diagram
2013-11-0003
3
PT0236-6
11/18/13
PT7M6832-6840
Ultra Low Voltage Detectors
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Maximum Ratings
Storage Temperature………………………………………… - 65
o
C to +150
o
C
Ambient Temperature with Power Applied....................-40oC to +85oC
Supply Voltage to Ground Potential (V
CC
to GND)………....... - 0.3V to +6.0V
Open-drain RESET, MR... ……………………………………..- 0.3V to +6.0V
RESET-IN, Push-pull RESET and RESET……………
….-0.3V to +6.0V
DC Input/Output Current …………………………………………………20mA
Power Dissipation………………………………………………………245mW
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
AC Electrical Characteristics
(V
CC
= +0.9V to +5.5V, unless otherwise noted. Typical values are at T
A
= +25º
C)
Description
Symbol
D0
D1
Reset Active Timeout Period
t
PD
D2
D3
D4
Vcc or RESET-IN to Reset Delay
Propagation Delay(D0 only)
Startup Time(D0 only)
MR Minimum Input Pulse Width
MR Glitch Rejection
MR to Reset Delay
t
P
-
-
-
-
Vcc falling, step signal from
(V
TH
+100mV) to (V
TH
-100mV)
Vcc rising, step signal from
(V
TH
-100mV) to (V
TH
+100mV)
Vcc rising from 0 to 1.1V(t
R
<1µs)
MR driven from Vcc to 0
MR driven from Vcc to 0
MR driven from Vcc to 0
Test Conditions
Min
-
1
20
140
1120
-
-
-
2
-
-
Typ
0.07
1.5
30
210
1680
60
70
150
-
100
500
Max
-
2
40
280
2240
-
-
-
-
-
-
µs
µs
µs
µs
ns
ns
ms
Unit
2013-11-0003
4
PT0236-6
11/18/13
PT7M6832-6840
Ultra Low Voltage Detectors
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DC Electrical Characteristics
(V
CC
= +0.9V to +5.5V, unless otherwise noted. Typical values are at T
A
= +25º
C)
Description
Sym.
Test Conditions
T
A
= -40º ~+85º PT7M6832/6835/6838,
C
C,
PT7M6834/6837/6840
T
A
= -40º ~+85º PT7M6833/6836/6839
C
C,
T
A
= 0º ~+85º PT7M6833/6836/6839
C
C,
T
A
= -40º ~+85º PT7M6838/6839/6840
C
C,
V
CC
=1.2V, no load , reset not asserted
Supply Current
I
CC
V
CC
=1.8V, no load , reset not asserted
V
CC
=3.6V, no load , reset not asserted
W
V
Reset Threshold
V
TH
I
H (-10º ~ +85º
C
C)
G (0º ~ +85º
C
C)
F*(
0º ~+85º
C
C)
1.5V<=V
CC
<=5.5V, RESET-IN falling from high
to low(25º
C)
1.5V<=V
CC
<=5.5V, RESET-IN rising from low
to high(0º ~85º
C
C)
Min
0.9
0.85
0.75
1.5
-
-
-
1.620
1.530
1.350
1.275
1.080
1.020
Typ
-
-
-
-
7.5
9
16
1.665
1.575
1.388
1.313
1.110
1.050
Max
5.5
5.5
5.5
5.5
13
16
25
1.710
1.620
1.425
1.350
1.140
1.080
V
µA
V
Unit
Operating Voltage Range
V
CC
-2%
-5%
-
0.8×
Vcc
0.8×
Vcc
0.8×
Vcc
0.8×
Vcc
-
-
-
-
-
-
-
0.7×
Vcc
-
-25
-
444
444
70
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.75
+2%
+5%
-
-
-
-
-
0.2×
Vcc
0.2×
Vcc
0.2×
Vcc
0.2×
Vcc
0.15
0.2
0.3×
Vcc
-
1.0
+25
-
V
V
-
ppm/
℃
RESET-IN Threshold
Reference voltage
temperature coefficient
V
RSTIN
T
C
Reference voltage temperature coefficient,
-40º ~+85º
C
C
V
CC
>=1.1V, I
source
=50µ reset not asserted
A,
V
CC
>=1.5V, I
source
=150µ reset not asserted
A,
V
CC
>=1.0V, I
source
=50µ reset asserted
A,
V
CC
>=1.5V, I
source
=150µ reset asserted
A,
Push-pull RESET
Output High Voltage
V
OH
Push-pull RESET
Output Low Voltage
Push-pull RESET
Output Low Voltage
Open-Drain RESET
Output Low Voltage
MR Input Voltage
Open-Drain RESET
Output Leakage Current
RESET-IN Leakage Current
Reset Threshold Hysteresis
V
IL
V
IH
I
LKG
I
RSTIN
V
HYS
V
OL
V
CC
>=1.0V, I
sink
=80µ reset asserted
A,
V
CC
>=1.5V, I
sink
=200µ reset asserted
A,
V
CC
>=1.1V, I
sink
=80µ reset not asserted
A,
V
CC
>=1.5V, I
sink
=200µ reset not asserted
A,
V
CC
>=1.0V, I
sink
=80µ reset asserted
A,
V
CC
>=1.5V, I
sink
=200µ reset asserted
A,
-
-
V
CC
> V
TH
, reset not asserted
-
-
V
µA
nA
% V
TH
2013-11-0003
5
PT0236-6
11/18/13
FPGA/CPLD
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