PT7M6314US
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Supervisory Circuit
Features
Highly accurate:
1.5%
(25°
C)
Detect voltage range: 1.8 to 5V in 100mV increments
Operating voltage range: 1.0V ~ 5.5V
Operating temperature range: -40° to + 85°
C
C
Detect voltage temperature characteristics:
2.5%
TYP
Output configuration: Bi-dir
Four reset timeout period available:
typical 1.6ms for PT7M6314USxxD1;
typical 26ms for PT7M6314USxxD2;
typical 200ms for PT7M6314USxxD3;
typical 1570ms for PT7M6314USxxD4;
General Description
The series are designed to monitor power supplies in µ
P
and digital systems. It provides excellent circuit
reliability and low cost by eliminating external
components and adjustments, and a debounced manual
reset input.
This device performs a single function: it asserts a reset
signal whenever the V
CC
supply voltage falls below a
preset threshold or whenever manual reset is asserted.
Reset remains asserted for an internally programmed
interval (reset timeout period) after V
CC
has risen above
the reset threshold or manual reset is de-asserted.
PT7M6314USxx are bidirectional output, allowing it to
be directly connected to µ with bidirectional reset inputs.
P
The serials come with factory-trimmed reset threshold
voltages in 100mV increments from 2.5V to 5V. Preset
timeout periods of 200ms and 1570ms (typ.) are available.
Pin Configuration
PT7M6315USxxD3F/D4F
1
GND
VCC
4
2
RST
SOT143-4
MR
3
Pin Description
Name Type
RST
I/O
Description
Reset Output and Pushbutton Input:
RST is asserted when V
CC
drops below voltage threshold V
TH-
. Active
low. When other devices pull RST low, the device will speed its rising edge once the reset condition release.
Manual Reset:
A logic low on MR asserts reset. Reset remains asserted as long as MR is low, and for the
reset timeout period (t
RS
) after the reset conditions are terminated. Connect to V
CC
if not used.
Ground
Supply Voltage.
MR
GND
V
CC
I
P
P
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Supervisory Circuit
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Maximum Ratings
Storage Temperature ............................................................-65C to +150C
Ambient Temperature with Power Applied .......................... -40C to +85C
Supply Voltage to Ground Potential (Vcc to GND) ..............-0.3V to +7.0V
DC Input Voltage (All inputs except Vcc and GND)......-0.3V to V
CC
+0.3V
DC Output Current (All outputs) ..........................................................30mA
Power Dissipation .......................................... 320mW (Depend on package)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
DC Electrical Characteristics
(T
A
= -40~85º unless otherwise noted. Typical values are at T
A
= +25º
C,
C)
Description
Supply Voltage
Supply Current
Sym.
V
CC
V
CC
= 5.5V. No load.
I
CC
V
CC
= 3.6V. No load.
+25C
Voltage Threshold
V
TH-
-40C~85C
Hysteresis
V
HYS
V
TH+
- V
TH-*
I
OH
= 8mA, V
CC
= 5V
Output
Driving
Output low
V
OL
I
OH
= 4mA, V
CC
= 3V
I
OH
= -50µ V
CC
= 1V
A,
MR
Internal pull-up resistor
R
P
RST pin. V
CC
= 3V.
RST pin. V
CC
= 5V.
V
CC
< 4V
Input High Voltage
V
IH
MR
V
CC
> 4V
V
CC
< 4V
Input Low Voltage
RST active pull-up enable
threshold
RST active pull-up current
V
IL
V
THUP
MR
V
CC
> 4V
V
CC
= 5V
V
CC
= 3.3V
0.7
0.9
20
0.8
1.2
V
mA
2.4
0.3×
Vcc
V
32
-
-
0.7×
Vcc
V
63
11
5
(V
TH-
)
0.985
(V
TH-
)
0.975
V
TH-
V
TH-
50
0.4
0.3
0.09
100
20
k
10
k
V
10
(V
TH-
)
1.015
(V
TH-
)
1.025
µA
V
Test Conditions
Min.
1.0
Typ.
Max.
5.5
12
Unit
V
µA
mV
Note:
V
TH-
is voltage threshold when V
CC
falls from high to low. V
TH+
is voltage threshold when V
CC
rises from low to high.
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Supervisory Circuit
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AC Electrical Characteristics
Timing diagram
t
SEN
VCC
V
RST
1V
0V
t
RS
t
RPD
t
RS
t
MD
t
RS
RST
1V
0V
t
MR
V
IH
0.8V
0V
MR
Uncertain state
VCC
V
RST
1V
0V
t
RS
t
S
t
R
RST
0.8V
CC
1V
0.5V
0V
0.5V
Uncertain state
External pull down
signal release
(V
CC
= 1.0V to 5.5V, T
A
= -40~85º unless otherwise noted. Typical values are at T
A
= +25º
C,
C)
Sym.
Description
Test Conditions
Part No.
Min.
6314USxxD1
1
6314USxxD2
17
t
RS
Reset Timeout Period
6314USxxD3
140
6314USxxD4
1120
t
RPD
Delay
t
SEN
Sensitivity
20
t
MD
MR to Reset Delay
t
MR
MR Pulse Width
1
t
S
External Pull Down Signal Pulse RST pin
1
C
LOAD
= 120pF
V
CC
= 3V
C
LOAD
= 250pF
t
R
RST Output Rise Time
C
LOAD
= 200pF
V
CC
= 5V
C
LOAD
= 400pF
Typ.
1.6
26
200
1570
10
500
Max.
2.2
40
280
2240
Unit
ms
ms
ms
ms
ns
s
ns
s
s
333
666
333
666
ns
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Supervisory Circuit
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Block Diagram
MR
63kΩ
Vcc
4us one-shot
VCC
Resistor
Divider
Logic Control
&Timing
Delay
5kΩ
RST
T.C.
Reference
GND
Function Description
Power Monitor
A microprocessor’s (µP’s) reset input starts the µP in a known state. Whenever the µ is in an unknown state, it should be held in
P
reset. The supervisory circuits assert reset during power-up and prevent code execution errors during power-down or brownout
conditions.
On power-up, once Vcc reaches about 1.0V, RST is a guaranteed logic low of 0.4V or less. As Vcc rises, RST stays low. When
Vcc rises above the reset threshold V
RST
, an internal timer releases RST after about 1570ms
(PT7M6314USxxD4)
. RST asserts
whenever Vcc drops below the reset threshold, i.e. brownout condition. If brownout occurs in the middle of a previously initiated
reset pulse, the pulse continues for at least another 1.6ms or 26ms or 200ms or 1570ms
(PT7M6314USxxD4)
. On power-down,
once Vcc falls below the reset threshold, RST stays low and is guaranteed to be 0.4V or less until Vcc drops below 1V.
Manual Reset
The manual-reset input (MR) allows reset to be triggered by a pushbutton switch. The switch is effectively debounced by the
1.6ms (PT7M6314USxxD1) or 26ms (PT7M6314USxxD2) or 200ms (PT7M6314USxxD3) or 1570ms (PT7M6314USxxD4)
reset pulse width.
Reset Output: Bi-direction
The PT7M6314USxx’s RESET output is designed to interface with µPs that have bidirectional reset pins, such as the Motorola
68HC11. Like an open-drain output, the PT7M6314USxx allows the µ or other devices to pull RST low and assert a reset
P
condition. However, unlike a standard open-drain output, it includes the commonly specified 5k pull-up resistor with a P-
channel active pull-up in parallel. This structure can speed the rising edge when the reset condition releases. The reset condition
will occur when Vcc drops below the reset threshold, or Manual Reset is set to ground, or RST is pulled down.
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Supervisory Circuit
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Application Information
Typical Operation Circuit
Fig 6. PT7M6314USxx Application Example
Vcc
Vcc
68HC11
MR
RST
PT7M6314USxx
C
STRAY
C
IN
Reset
Circuit
Other Devices
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