series
Marvell Avastar 88W8787 SoC
WLAN/Bluetooth/FM Single-Chip SoC
PRODUCT OVERVIEW
The Marvell
®
Avastar™ 88W8787 is a highly integrated system-on-a-chip (SoC), specifically designed to support high
throughput data rates for next-generation products. The Marvell Avastar family of wireless devices delivers best-in-
class single-function and multi-function radios for the entire spectrum of always-on consumer electronics devices.
The Marvell Avastar 88W8787 SoC is designed for both simultaneous and independent operation of the following:
•
IEEE 802.11a/g/b and 802.11n payload data rates for Wireless Local Area Network (WLAN)
•
Bluetooth 3.0 + High Speed (HS) (also compliant with Bluetooth 2.1 + EDR)
•
FM transmit and receive (digital encoder/decoder FM radio with RDS/RBDS)
The device supports the 802.11i security standard through implementation of the Advanced Encryption Standard
(AES)/Counter Mode CBC-MAC Protocol (CCMP), Wired Equivalent Privacy (WEP) with Temporal Key Integrity Protocol
(TKIP), Advanced Encryption Standard (AES)/Cipher-Based Message Authentication Code (CMAC), and WLAN
Authentication and Privacy Infrastructure (WAPI) security mechanisms.
For video, voice, and multimedia applications, 802.11e Quality of Service (QoS) is supported. The device also supports
802.11h Dynamic Frequency Selection (DFS) for detecting radar pulses when operating in the 5 GHz range.
The 88W8787 supports generic interfaces including SDIO, G-SPI, high-speed UART, and PCM for connecting WLAN,
Bluetooth, and FM to the host processor. For FM Tx/Rx, the device supports Inter-IC Sound (I2S) / analog stereo audio
interfaces. An I2C-compatible interface is available to connect FM Tx/Rx to the host processor, as well. FM Tx/Rx can
also share the host interface with Bluetooth.
The device is also equipped with a coexistence interface for external, co-located 2.4 GHz radios.
Available packaging includes a TFBGA or CSP flip chip option.
BLOCK DIAGRAM
Processor
CPU
Interface
ROM
Timers/
Interrupts
Power
Management
WLAN MAC/Baseband
Direct Conversion RF
LNA
JTAG Interface
Marvell
Feroceon
CPU
802.11
MAC
802.11
Baseband
(DSSS/OFDM)
Coexistence
Arbiter
5 GHz External PA
5 GHz WLAN Rx
5 GHz WLAN Tx
JTAG
Power Management
Battery/Low Voltage LDO
Power Down
Bluetooth
I S/PCM
2
WLAN RF
LNA
Shared
LNA
WLAN/Bluetooth Rx
WLAN Tx
2.4 GHz External PA
Bluetooth
Baseband
C
P
U
B
U
S
LDO
SP3T
Bluetooth DSP
I
N
T
E
R
N
A
L
B
U
S
DMA
Bluetooth RF
LNA
RF Input
RF Output
Sleep Clock
FM Tx/Rx
FM RF
Interface
FM RF
Encryption
c
Bluetooth Tx/Rx
SRAM
Audio Interface
Common Analog
Common Analog Unit
XTAL_IN
XTAL_OUT
Coexistence Interface
(external co-located 2.4 GHz radio)
I S Audio Codec Interface
2
Audio Codec
Controller
Peripheral Bus
Host Interfaces
SDIO
SDIO
3-Wire,4-Wire Interface
2-Wire Serial Interface
1-Wire Serial Interface
Serial EEPROM
GPIO
Clocked
Serial Unit
B
U
S
G-SPI
Peripheral Bus Unit
UART
I 2C-Compatible
G-SPI
GPIO/LED
High Speed UART
2
I C-compatible (slave from Host)
Fig 1. Avastar 88W8787 SoC Block Diagram
1. Antenna can be used as an option to enhance performance
1
series
Marvell Avastar 88W8787 SoC
SPECIFICATIONS
WLAN MAC
•
Ad-Hoc and Infrastructure Modes
•
RTS/CTS for operation under DCF
•
Hardware filtering of 32 multicast addresses and duplicate frame
detection for up to 32 unicast addresses
•
On-chip Tx and Rx FIFO for maximum throughput
•
Open System and Shared Key Authentication services
•
A-MPDU Rx (de-aggregation) and Tx (aggregation)
GENERAL FEATURES
•
Simultaneous and independent WLAN, Bluetooth, and FM Tx/Rx
operation
•
Coexistence with cellular and other on-chip radios
•
Low power dissipation
•
CMOS and low-swing sine wave input clock
•
Digital audio interfaces (I2S and PCM)
•
12, 13, 19.2, 24, 26, 38.4, and 52 MHz crystal clock support with auto-
frequency detection using external 32.768 KHz CMOS-level sleep clock
•
Power management with external sleep clock support for FM Tx/Rx
operation
•
Sleep and standby modes for low power operation
•
Fully compatible with Marvell Power Management device(s)
WLAN BASEBAND
•
802.11n 1x1 SISO with on-chip Marvell SISO RF radio
IEEE 802.11 STANDARDS
•
802.11 data rates of 1 and 2 Mbps
•
802.11b data rates of 5.5 and 11 Mbps
•
802.11a/g data rates 6, 9, 12, 18, 24, 36, 48, and 54 Mbps for
multimedia content transmission
•
802.11g/b performance enhancements
•
802.11n compliant, with maximum data rates up to 72 Mbps (20 MHz
channel) and 150 Mbps (40 MHz channel)
•
802.11d international roaming
•
802.11e QoS block acknowledgement (with support for 802.11n
extension)
•
802.11h transmit power control
•
802.11h DFS radar pulse detection
•
802.11i enhanced security
•
802.11k radio resource measurement
•
802.11r fast hand-off for AP roaming
•
802.11w protected management frames
•
Fully supports clients (stations) implementing IEEE Power Save mode
•
Backward compatibility with legacy 802.11a/g/b technology
•
WLAN/Bluetooth LNA sharing
•
PHY data rates up to 150 Mbps
•
20, 40, 20 in 40 MHz, and duplicate legacy mode operation
•
Modulation and Coding Scheme (MCS)—0~7 and 32 (duplicate 6 Mbps)
•
Enhanced radar detection for long and shot pulse radar
•
Enhanced AGC scheme for DFS channel
•
Japan DFS requirements for W53 and W56
•
Radio resource measurement
•
Optional 802.11n SISO features:
- 20/40 MHz coexistence
- 1-stream STBC reception
- Short guard interval
- RIFS on receive path
- Beamformee function and hardware acceleration
- Greenfield Tx/Rx
•
Power save features
•
20/40 MHz coexistence
•
Reduced Inter-Frame Spacing (RIFS) bursting
•
Management information base counters
•
Radio resource measurement counters
•
Block acknowledgement with 802.11n extension
•
Dynamic frequency selection (DFS)
•
Transmit beamformee support
•
Transmit rate adaptation
•
Transmit power control
•
Long and short preamble generation on a frame-by-frame basis for
802.11b frames
APPLICATIONS
•
WLAN/Bluetooth/FM enabled cellular handsets
•
Portable audio/video devices and accessories
•
Personal navigation devices
•
Personal digital assistants
•
Gaming platforms
PACKAGING
•
120-pin TFBGA
•
CSP Flip Chip
WLAN RADIO
•
Integrated direct-conversion radio
•
20 and 40 MHz channel bandwidths
•
Shared WLAN/Bluetooth receive input scheme for 2.4 GHz band
PROCESSOR
•
CPU
- Integrated Marvell Feroceon® CPU (ARMv5TE-compliant)
- 160 MHz maximum CPU clock speed
•
DMA
- Independent 2-Channel Direct Memory Access (DMA)
WLAN Rx PATH
•
Direct conversion architecture eliminates need for external SAW filter
•
On-chip gain selectable LNA with optimized noise figure and power
consumption
•
High dynamic range AGC function in receive mode
WLAN Tx PATH
MEMORY
•
Internal SRAM for Tx frame queues/Rx data buffers
•
Boot ROM
•
ROM patching capability
•
External PA with power control
•
Closed/open loop power control (0.5 dB increments)
•
Optimized Tx gain distribution for linearity and noise performance
series
Marvell Avastar 88W8787 SoC
SPECIFICATIONS
WLAN LOCAL OSCILLATOR
•
Fractional-N for multiple reference clock support
•
Fine channel step, AFC (adaptive frequency control)
FM Rx PATH
•
FM/RDS/RBDS receiver
•
Automatic frequency control (AFC)
•
Auto search tuning
•
Softmute
WLAN ENCRYPTION
•
WEP 64- and 128-bit encryption with hardware TKIP processing (WPA)
•
AES-CCMP hardware implementation as part of 802.11i security
standard (WPA2)
•
Enhanced AES engine performance
•
AES-Cipher-Based Message Authentication Code (CMAC) as part of the
802.11w security standard
•
WLAN Authentication and Privacy Infrastructure (WAPI)
•
Audio mute
•
Mono/stereo blending (signal dependent)
•
Digital FM demodulation
•
RDS data buffer
•
FM audio routed internally as SCO source
•
Programmable pre/de-emphasis (50/75 µs)
•
TMC (traffic alert) supported
•
Enable/disable stereo mode
•
FM audio option to turn off CPU if no RDS
BLUETOOTH
•
Bluetooth 3.0 + HS (also compliant with Bluetooth 2.1 + EDR)
•
Bluetooth Class 2
•
Bluetooth Class 1
•
Single-ended, shared Tx/Rx path for Bluetooth
•
Shared LNA for WLAN/Bluetooth
•
Digital audio interfaces including PCM interface for voice applications
and I2S for digital stereo applications
•
Baseband and radio BDR and EDR packet types—1 Mbps (GFSK), 2
Mbps (p/4-DQPSK), and 3 Mbps (8DPSK)
•
Fully functional Bluetooth baseband—AFH, forward error correction,
header error control, access code correlation, CRC, encryption bit
stream generation, and whitening
•
Adaptive Frequency Hopping (AFH) including Packet Loss Rate (PLR)
•
Interlaced scan for faster connection setup
•
Simultaneous active ACL connection support
•
Automatic ACL packet type selection
•
Full master and slave piconet support
•
Scatternet support
•
Standard UART, G-SPI, and SDIO HCI transport layer
•
HCI layer verified to function with major profile stack vendors
•
SCO/eSCO links with hardware accelerated audio signal processing and
hardware supported PPEC algorithm for speech quality improvement
•
All standard SCO/eSCO voice coding
•
All standard pairing, authentication, link key, and encryption operations
•
Standard Bluetooth power saving mechanisms (i.e., hold, sniff modes)
•
Enhanced low power scan mode
•
Dynamic Transmit Power Control (TPC)
•
Channel Quality Driven (CQD) data rate
•
SBC off load for A2DP streaming
•
Wideband Speech Support
PERIPHERAL BUS INTERFACES
•
Clocked Serial Unit (CSU)
- 3-Wire, 4-Wire Serial Interface
FM RADIO
•
Worldwide FM band—76–108 MHz
•
Full Tx/Rx operation with main clock as well as 32.768 kHz external
sleep clock
•
Channel spacing/frequency step size (50 kHz steps)
•
Stereo analog and digital input/output for Tx/Rx
- 2-Wire Serial Interface
- 1-Wire Serial Interface
- SPI Serial EEPROM
•
General Purpose Input Output (GPIO)
HOST INTERFACES
•
SDIO device interface (SPI, 1-bit SDIO, 4-bit SDIO transfer modes at
full clock range up to 75 MHz)[1]
•
G-SPI device interface (WLAN and Bluetooth)[2]
•
High speed UART interface
•
Optional I2C-compatible slave interface for FM control
COEXISTENCE
•
Coexistence interface for external, co-located 2.4 GHz radio
- Marvell 3/4-wire interface
- WL_ACTIVE 3/4-wire interface
- WL_ACTIVE 2-wire interface
FM Tx PATH
•
FM/RDS/RBDS transmitter
•
RDS data buffer
•
High Tx output power (+125 dBµVrms) for loop antenna
•
Auto scan for channel selection
•
Auto channel sync through RDS
•
Audio mute
•
Audio Automatic Gain Control (AGC)
•
Compensation for 32 kHz clock error
•
Audio silence detection
•
Alternate frequency
series
Marvell Avastar 88W8787 SoC
SPECIFICATIONS
AUDIO INTERFACES
•
Audio Codec Interface
- Marvell Class D Audio Amplifier
- I2S (Inter-IC Sound) interface for audio data connection to Analog-
to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC)
- Master and slave mode for I2S, MSB, and LSB audio interfaces
- Tri-state I2S interface capability
•
PCM Interface
- Master or slave mode
- PCM bit width size of 8 bits or 16 bits
- Up to 4 slots with configurable bit width and start positions
- Short frame and long frame synchronization
- Tri-state PCM interface capability
TEST
•
On-chip diagnostic information
1.
2.
SDIO may be used as host interface for WLAN, Bluetooth, and FM. Function 1 used for
WLAN, and Function 2 used for Bluetooth/FM.
G-SPI may also used as a host interface for FM. G-SPI may be shared between Bluetooth
and FM with WLAN on a different host interface.
THE MARVELL ADVANTAGE:
Marvell chipsets come with complete reference designs which include board layout designs, software,
manufacturing diagnostic tools, documentation, and other items to assist customers with product evaluation and production. Marvell’s
worldwide field application engineers collaborate closely with end customers to develop and deliver new leading-edge products for quick
time-to-market. Marvell utilizes world-leading semiconductor foundry and packaging services to reliably deliver high-volume and low-cost
total solutions.
ABOUT MARVELL:
Marvell is a leader in storage, communications, and consumer silicon solutions. Marvell’s diverse product portfolio includes
switching, transceiver, communications controller, processor, wireless, power management, and storage solutions that power the entire
communications infrastructure, including enterprise, metro, home, storage, and digital entertainment solutions. For more information, visit our
Web site at
www.marvell.com.
Marvell Semiconductor, Inc.
5488 Marvell Lane
Santa Clara, CA 95054
Phone 408.222.2500
www.marvell.com
Copyright © 2010. Marvell International Ltd. All rights reserved. Marvell, Moving Forward
Faster, the Marvell logo, Alaska, AnyVoltage, DSP Switcher, Fastwriter, Feroceon, Libertas,
Link Street, PHYAdvantage, Prestera, TopDog, Virtual Cable Tester, Yukon, and ZJ are
registered trademarks of Marvell or its affiliates. Armada, Avastar, CarrierSpan, LinkCrypt,
Marvell Smart, PowerSmart PFC, Powered by Marvell Green PFC, Qdeo, QuietVideo,
Sheeva, TwinD, and VCT are trademarks of Marvell or its affiliate. All other trademarks are
the property of their respective owners.
Avastar_88W8787-01 2/10
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