Transient Voltage Suppressors Array for ESD Protection
SR05-04A
Description
The SR05-04A is designed to protect voltage sensitive
components from ESD and transient voltage events. Excellent
clamping capability, low leakage, and fast response time,
make these parts ideal for ESD protection on designs where
board space is at a premium.
Low Capacitance
SOT-26
Feature
u
u
u
u
u
u
u
u
300 Watts Peak Pulse Power per Line (tp=8/20μs)
Protects four I/O lines
Low clamping voltage
Working voltages : 5V
Low leakage current
IEC61000-4-2 (ESD)
±15kV
(air),
±8kV
(contact)
IEC61000-4-4 (EFT) 40A (5/50ηs)
IEC61000-4-5 (Lightning) 3A (8/20μs)
Functional Diagram
Applications
u
u
u
u
u
u
u
u
USB 2.0 Power and Data Line Protection
Video Graphics Cards
Monitors and Flat Panel Displays
Digit Video Interface (DVI)
10/100/1000 Ethernet
Notebook Computers
SIM Ports
ATM Interfaces
u
u
u
u
u
u
JEDEC SOT-26 Package
Molding Compound Flammability Rating : UL 94V-0
Weight 16.0 Milligrams (Approximate)
Quantity Per Reel : 3,000pcs
Reel Size : 7 inch
Lead Finish : Lead Free
Mechanical Characteristics
Mechanical Characteristics
Symbol
P
PP
T
L
T
STG
T
J
Parameter
Peak Pulse Power (tp=8/20μs waveform)
Lead Soldering Temperature
Storage Temperature Range
Operating Temperature Range
IEC61000-4-2 (ESD)
Air Discharge
Contact Discharge
IEC61000-4-4 (EFT)
IEC61000-4-5 ( Lightning )
Value
300
260 (10sec)
-55 to +150
-55 to +150
±15
±8
40
3
Units
W
ºC
ºC
ºC
KV
A
A
UN Semiconductor Co., Ltd.
Revision January 06, 2014
www.unsemi.com.tw
1/7
@ UN Semiconductor Co., Ltd. 2014
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Transient Voltage Suppressors Array for ESD Protection
SR05-04A
Electrical Characteristics
(@ 25℃ Unless Otherwise Specified )
Device
Marking
V
RWM
(V)
(Max.)
5.0
V
B
(V)
(Min.)
6.0
I
T
(mA)
V
C
@1A
(Max.)
9.8
V
C
(Max.)
(@A)
Low Capacitance
Part Number
I
R
(μA)
(Max.)
1
C
(pF)
(Typ.)
1.0
SR05-04A
B05B
1
23.0
3
Characteristic Curves
Fig1.
8/20μs Pulse Waveform
Fig2. ESD Pulse Waveform (according to IEC 61000-4-2)
100%
Percent of Peak Pulse Current %
90%
120
I
PP
- Peak Pulse Current - % of I
PP
100
80
60
40
t
d
=t I
PP
/2
20
0
0
5
10
15
t - Time (μs)
20
25
30
t
r
Peak Value I
PP
TEST
WAVEFORM
PARAMETERS
t
r
=8μs
t
d
=20μs
10%
tr = 0.7~1ns
30ns
60ns
Time (ns)
Fig3.
Power Derating Curve
110
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
Ambient Temperature
–
T
A
(ºC)
UN Semiconductor Co., Ltd.
Revision January 06, 2014
% of Rated Power
www.unsemi.com.tw
2/7
@ UN Semiconductor Co., Ltd. 2014
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Transient Voltage Suppressors Array for ESD Protection
SR05-04A
Characteristic Curves
Fig4.
ESD Clamping (+8KV Contac per IEC61000-4-2)
Fig5.
Low Capacitance
ESD Clamping (-8KV Contac per IEC61000-4-2)
SOT-26 Package Outline & Dimensions
Symbol
Min.
A
A1
A2
b
0.035
0.000
0.010
0.003
Inches
Millimeters
Nom. Max. Min. Nom. Max.
-
-
-
-
0.057 0.90
0.006 0.00
0.020 0.25
0.009 0.08
-
-
-
-
1.45
0.15
0.50
0.22
0.035 0.045 0.051 0.90 1.15 1.30
θ
c
D
E1
E
e
e1
L
L1
θ
aaa
bbb
ccc
0.110 0.114 0.122 2.80 2.90 3.10
0.060 0.063 0.069 1.50 1.60 1.75
0.110 BSC
0.037 BSC
0.075 BSC
(0.024)
0°
-
0.004
0.008
0.008
Inches
(0.098)
0.055
0.037
0.024
0.043
0.141
10°
0°
2.80 BSC
0.95 BSC
1.90 BSC
(0.60)
-
0.10
0.20
0.20
Millimeters
(2.50)
1.40
0.95
0.60
1.10
3.60
10°
0.012 0.018 0.024 0.30 0.45 0.60
Soldering Footprint
Symbol
C
G
P
X
Y
Z
UN Semiconductor Co., Ltd.
Revision January 06, 2014
www.unsemi.com.tw
3/7
@ UN Semiconductor Co., Ltd. 2014
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Transient Voltage Suppressors Array for ESD Protection
SR05-04A
Applications Information
Figure 1. Data Line and Power Supply Protection
Using V
CC
as reference
Low Capacitance
Device Connection Options for Protection of
Four High-Speed Data Lines
The SR05-04A is designed to protect four data lines
from transient over-voltages by clamping them to a
fixed reference.
When the voltage on the
protected line exceeds the reference voltage (plus
diode VF) the steering diodes are forward biased,
conducting the transient current away from the
sensitive circuitry. Data lines are connected at pins 1, 3,
4 and 6.
The negative reference (REF1) is
connected at pin 2.
This pin should be connected
directly to a ground plane on the board for best results.
The path length is kept as short as possible to minimize
parasitic inductance. The positive reference (REF2) is
connected at pin 5. The options for connecting the
positive reference are as follows:
1. To protect data lines and the power line, connect pin 5
directly to the positive supply rail (V
CC
).
In this
configuration the data lines are referenced to the
supply voltage.
The internal TVS diode prevents
over-voltage on the supply rail (See Figure1).
2. The SR05-04A can be isolated from the power
supply by adding a series resistor between pin 5
and VCC. A value of 100kΩ is recommended.
The internal TVS and steering diodes remain biased,
providing the advantage of lower capacitance (See
Figure2).
3. In applications where no positive supply reference is
available, or complete supply isolation is desired, the
internal TVS may be used as the reference. In this
case, pin 5 is not connected.
The steering diodes
will begin to conduct when the voltage on the
protected line exceeds the working voltage of the TVS
(plus one diode drop) (See Figure3).
Figure 2. Data Line Protection with Bias and Power
Supply Isolation Resistor
Figure 3. Data Line Protection Using Internal TVS
Diode as Reference
UN Semiconductor Co., Ltd.
Revision January 06, 2014
www.unsemi.com.tw
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@ UN Semiconductor Co., Ltd. 2014
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
Transient Voltage Suppressors Array for ESD Protection
SR05-04A
Applications Information (Continue)
Figure 4．Video Interface Protection
Video Interface Protection
Low Capacitance
Video interfaces are susceptible to transient voltages
resulting from electrostatic discharge (ESD) and
“hot
plugging” cables. If left unprotected, the video interface
IC may be damaged or even destroyed. Protecting a
high-speed video port presents some unique challenges.
SR05-4A
First, any added protection device must have extremely
low capacitance and low leakage current so that the
integrity of the video signal is not compromised. Second,
the protection component must be able to absorb high
voltage transients without damage or degradation.
As a
minimum, the device should be rated to handle ESD
voltages per IEC61000-4-2, level 4 (±15kV air,
±8kV
contact). The clamping voltage of the device (when
SR05-4A
conducting high current ESD pulses) must be sufficiently
low enough to protect the sensitive CMOS IC. If the
clamping voltage is too high, the
“protected”
device may
latch-up or be destroyed. Finally, the device must take up
a relatively small amount of board space, particularly in
portable applications such as notebooks and handhelds.
The SR05-4A is designed to meet or exceed all of the
above criteria. A typical video interface protection circuit
SR05-4A
Figure 5 - Dual USB Port Protection
is shown in Figure 4. All exposed lines are protected
including R, G, B, H-Sync, V-Sync, and the ID lines for
plug and play monitors.
Universal Serial Bus ESD Protection
The SR05-04A may also be used to protect the USB
ports on monitors, computers, peripherals or portable
systems. Each device will protect up to two USB ports
Figure 6 - SIM Port
(Figure5). When the voltage on the data lines
exceed the bus voltage (plus one diode drop), the
internal rectifiers are forward biased conducting the
transient current away from the protected controller
chip. The TVS diode directs the surge to ground.
The TVS diode also acts to suppress ESD strikes
SR05-4A
directly on the voltage bus. Thus, both power and
data pins are protected with a single device.
UN Semiconductor Co., Ltd.
Revision January 06, 2014
www.unsemi.com.tw
5/7
@ UN Semiconductor Co., Ltd. 2014
Specifications are subject to change without notice.
Please refer to www.unsemi.com.tw for current information.
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