NJW4830
Single High Side Switch
GENERAL DESCRIPTION
The NJW4830 is the single high-side switch that can supply
0.5A.
The active clamp circuit, overcurrent and thermal shutdown are
built-in with Pch MOS FET.
It can be controlled by a logic signal (3V/5V) directly. Therefore, it
is suitable for Car accessory, Industrial Equipments and other
applications.
PACKAGE OUTLINE
NJW4830U2
FEATURES
Drain-Source Voltage
45V
Drain Current
0.5A
Corresponding with Logic Voltage Operation: 3V/5V
Low On-Resistance
0.35Ω (typ.)
Low Consumption Current
110µA (typ.)
Active Clamp Circuit
Over Current Protection
Thermal Shutdown
Package Outline
SOT89-5
PIN CONFIGURATION
5
2
4
1. IN
2. GND
3. FLT
4. VDD
5. OUT
1
2
3
BLOCK DIAGRAM
VDD
FLT
Over
Current
Protection
FLT
DELAY
VDD
Level Shift
IN
Thermal
Shut Down
Active
Clamp
GND
OUT
Ver.2014-01-08
-1-
NJW4830
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYNBOL
Drain-Source Voltage
V
DS
Supply Voltage
V
DD
Input Voltage
V
IN
FLT Pin Voltage
V
FLT
Power Dissipation
P
D
RATINGS
+45
+45
−0.3
to
+6
−0.3
to
+6
625 (*1)
2,400 (*2)
UNIT
V
V
V
V
mW
(Ta=25°C)
REMARK
VDD–OUT Pin
VDD–GND Pin
IN–GND Pin
FLT–GND Pin
–
Active Clamp Tolerance
E
AS
10
mJ
–
(Single Pulse)
Active Clamp Current
I
AP
0.5
A
–
Junction Temperature
T
j
–
−40
to
+150
°C
Operating Temperature
T
opr
–
−40
to
+85
°C
Storage Temperature
T
stg
–
−50
to
+150
°C
(*1): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard size, 2Layers, Cu area 100mm
2
)
(*2): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 4Layers)
(For 4Layers: Applying 74.2×74.2mm inner Cu area and a thermal via hall to a board based on JEDEC standard JESD51-5)
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN.
Drain–Source Voltage
V
DS
0
Supply Voltage
V
DD
4.6
Output Current
I
O
0
Input Pin Voltage
V
IN
0
FLT Pin Voltage
V
FLT
0
TYP.
–
–
–
–
–
MAX.
40
40
0.5
5.5
5.5
UNIT
V
V
A
V
V
REMARK
VDD–OUT Pin
VDD–GND Pin
VDD–OUT Pin
IN–GND Pin
FLT–GND Pin
-2-
Ver.2014-01-08
NJW4830
ELECTRICAL CHARACTERISTICS
PARAMETER
Drain-Source Output Clamp Voltage
(Unless otherwise noted, V
DS
=13V, Ta=25°C)
CONDITIONS
V
IN
=0V, I
O
=1mA, V
DD
=40V
I
O
=10mA
I
O
=100µA
MIN.
V
DD
-45
2.64
–
2.64
V
IN
=0V, V
DD
=40V
V
IN
=0V, V
DD
=40V
V
IN
=5V
V
IN
=5V
V
IN
=5V, I
O
=0.5A
V
IN
=5V, V
DS
=5V
V
IN
=5V, V
DD
=V
DS
=40V
V
IN
=0 to 5V, I
O
=0.5A
V
IN
=5 to 0V, I
O
=0.5A
V
IN
=0V, I
ORH
=1A
I
FLT
=500µA
V
FLT
=5.5V
V
IN
=0 to 5V, V
DS
=22V
–
–
–
–
–
0.5
0.1
–
–
–
–
–
–
TYP.
–
–
–
–
–
–
110
150
0.35
0.75
0.4
20
20
0.85
0.25
–
5
MAX.
–
–
0.9
5.5
1
1
150
190
0.6
1.2
–
–
–
1.2
0.5
1
–
UNIT
V
V
V
V
µA
µA
µA
µA
Ω
A
A
µs
µs
V
V
µA
ms
SYMBOL
V
DSS_CL
V
IH
V
IL
V
IN_opr
I
OLEAKOUT
I
DD1
I
DD2
I
IN
R
DS_ON
I
LIMIT1
I
LIMIT2
t
ON
t
OFF
V
PDOV
V
VFLT
I
OLEAKFLT
t
DFLT
High Level Input Voltage
Low Level Input Voltage
Protection Circuit Function
Input Voltage Range
OUT Pin Leak Current
at OFF State
Quiescent Current 1
Quiescent Current 2
Input Current
On-state Resistance
Over Current Protection1
Over Current Protection2
Turn-on Time
Turn-off Time
OUT–VDD Voltage Difference
FLT Pin Low Level
Output Voltage
FLT Pin Leak Current
at High Level
FLT Delay Time
TRUTH TABLE
Input Signal
Operating Condition
L
H
L
H
L
H
L
H
Normal
Over Current I
LIMIT1
Over Current I
LIMIT2
T
j
>150°C
FLT Pin
H
L
H
L
H
L
H
H
Output Status
OFF
ON
OFF
I
LIMIT1
OFF
I
LIMIT2
OFF
OFF
Ver.2014-01-08
-3-
NJW4830
TIMING CHRAT
ON, OFF Switching Time (V
IN
=0 to 5V, V
DD
=13V, I
O
=0.5A)
90%
IN
10%
90%
OUT
10%
t
ON
t
OFF
FLT Delay Time (V
IN
=0 to 5V, V
DD
=V
DS
=22V)
IN
50%
90%
FLT
t
DFLT
FLT Delay Time Measurement Circuit
5V
V
NJW4830
+
VDD
5V
0V
V
DS
OUT
IN
FLT GND
-4-
Ver.2014-01-08
NJW4830
High
Input signal
Low
ON
Over Current
Protection
OFF
ON
Thermal Protection
OFF
VDD
Output voltage
0V
V
DSS_CL
I
LIMIT1
I
LIMIT2
Output current
0A
t
DFLT
High
Fault signal
Low
Inductive
load
Normal
Current limit1
Current limit2
Thermal
shutdown
Active clamp
Ver.2014-01-08
-5-
Microchip MCU
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