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LAN8820/LAN8820I

RGMII 10/100/1000 Ethernet Transceiver

with HP Auto-MDIX Support

Highlights

• Single-Chip Ethernet Physical Layer Transceiver

(PHY)

• Compliant with IEEE 802.3ab (1000BASE-T),

IEEE 802.3u (Fast Ethernet), and ISO 802-3/IEEE

802.3 (10BASE-T)

• HP Auto-MDIX support in accordance with IEEE

802.3ab specification at 10/100/1000 Mbps oper-

ation

• Miniature 56-pin QFN lead-free RoHS compliant

package with RGMII (8 x 8 x 0.85mm height)

• Flexible configurations for LED status indicators

• Implements Reduced Power Operating Modes

Key Benefits

• High-Performance 10/100/1000 Ethernet Trans-

ceiver

- Compliant with IEEE 802.3ab (1000BASE-T)

- Compliant with IEEE 802.3/802.3u (Fast

Ethernet)

- Compliant with ISO 802-3/IEEE 802.3

(10BASE-T)

- 10BASE-T, 100BASE-TX and 1000BASE-T

support

- Loop-back modes

- Auto-negotiation (NEXT page support)

- Automatic polarity detection and correction

- Link status change wake-up detection

- Vendor specific register functions

- Supports reduced pin count RGMII interface

- Controlled impedance outputs

- Supports RGMII ID mode

Target Applications

•

Set-Top Boxes

Networked Printers and Servers

Test Instrumentation

LAN on Motherboard

Embedded Telecom Applications

Video Record/Playback Systems

Cable Modems/Routers

DSL Modems/Routers

Digital Video Recorders

IP and Video Phones

Wireless Access Points

Digital Televisions

Digital Media Adaptors/Servers

Gaming Consoles

POE Applications

- Four status LED outputs and configurable

LED modes with support for tricolor operation

- Compliant with IEEE 802.3-2005 standards

- RGMII pins tolerant to 3.6V

•

- Integrated DSP implements adaptive equal-

izer, echo cancellers, and crosstalk cancel-

lers

- Efficient digital baseline wander correction

Power and I/Os

- Configurable LED outputs

- Various low power modes

- 2.5V I/O supply

Miscellaneous Features

- IEEE 1149.1 (JTAG) boundary scan

- Multiple clock options - 25MHz crystal or

25MHz single-ended clock

Packaging

- 56-pin QFN (8x8 mm) RoHS compliant pack-

age with RGMII

Environmental

- Commercial temperature range

(0°C to +70°C)

- Industrial temperature range (-40°C to

+85°C)



2009-2015 Microchip Technology Inc.

DS00001871B-page 1

LAN8820/LAN8820I

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip

products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and

enhanced as new volumes and updates are introduced.

If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via

E-mail at

docerrors@microchip.com.

We welcome your feedback.

Most Current Data Sheet

To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:

http://www.microchip.com

You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.

The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-

rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the

revision of silicon and revision of document to which it applies.

To determine if an errata sheet exists for a particular device, please check with one of the following:

• Microchip’s Worldwide Web site;

http://www.microchip.com

• Your local Microchip sales office (see last page)

When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are

using.

Customer Notification System

Register on our web site at

www.microchip.com

to receive the most current information on all of our products.

DS00001871B-page 2



2009-2015 Microchip Technology Inc.

LAN8820/LAN8820I

Table of Contents

1.0 Introduction ..................................................................................................................................................................................... 4

2.0 Pin Description and Configuration .................................................................................................................................................. 5

3.0 Functional Description .................................................................................................................................................................. 13

4.0 Register Descriptions .................................................................................................................................................................... 34

5.0 Operational Characteristics ........................................................................................................................................................... 60

6.0 Package Outline ............................................................................................................................................................................ 76

Appendix A: Data Sheet Revision History ........................................................................................................................................... 78

The Microchip Web Site ...................................................................................................................................................................... 80

Customer Change Notification Service ............................................................................................................................................... 80

Customer Support ............................................................................................................................................................................... 80

Product Identification System ............................................................................................................................................................. 81



2009-2015 Microchip Technology Inc.

DS00001871B-page 3

LAN8820/LAN8820I

1.0

INTRODUCTION

The LAN8820/LAN8820i is a low-power 10BASE-T/100BASE-TX/1000BASE-T Gigabit Ethernet physical layer (PHY)

transceiver that is fully compliant with the IEEE 802.3 and 802.3ab standards.

The LAN8820/LAN8820i can be configured to communicate with an Ethernet MAC via the standard RGMII interface. It

contains a full-duplex transceiver for 1000Mbps operation on four pairs of category 5 or better balanced twisted pair

cable. Per IEEE 802.3-2005 standards, all digital interface pins are tolerant to 3.6V.

The LAN8820/LAN8820i is configurable via hardware and software, supporting both IEEE 802.3-2005 compliant and

vendor-specific register functions via SMI. The LAN8820/LAN8820i implements Auto-Negotiation to automatically

determine the best possible speed and duplex mode of operation. HP Auto-MDIX support allows the use of direct con-

nect or cross-over cables.

An internal block diagram of the LAN8820/LAN8820i is shown in

Figure 1-1.

A typical system-level diagram is shown in

Figure 1-2.

FIGURE 1-1:

INTERNAL BLOCK DIAGRAM

3

PLL

Digital TX

Scrambler

Trellis

4DPAM-5 Encoders

3

2

1

0

Spectral

Shaper

3

2

1

0

Analog

TX

2

1

3

2

1

0

3

2

1

0

LEDs

RGMII

Physical

Coding

Sublayer

1

0

Active

Hybrid

3

Digital RX

Descrambler

Viterbi Decoder

4DPAM-5 Decoders

10/100/1000

Ethernet

JTAG

TAP

Controller

3

2

1

0

DSP

3

2

1

0

Analog

RX

2

1

3

2

1

0

2

1

0

LAN8820/LAN8820i

FIGURE 1-2:

SYSTEM LEVEL BLOCK DIAGRAM

Crystal

10/100/1000

Ethernet MAC

RGMII

LAN8820/

LAN8820i

MDI

Ethernet

Magnetics

Ethernet

JTAG

LED

Status

DS00001871B-page 4



2009-2015 Microchip Technology Inc.

LAN8820/LAN8820I

2.0

PIN DESCRIPTION AND CONFIGURATION

FIGURE 2-1:

56-QFN PIN ASSIGNMENTS (TOP VIEW)

TR0N

TR0P

VDD12A

TR1N

TR1P

VDD12A

VDD12BIAS

VDD12PLL

TR2N

TR2P

VDD12A

TR3N

TR3P

VDD12A

43

44

45

46

47

48

49

50

51

52

53

54

55

56

28

27

26

TXCTRL

TXD0

TXD1

TXD2

VDD25IO

VDD12CORE

TXD3

NC

VDD12CORE

VDD25IO

RXC

IRQ

nRESET

HPD

LAN8820/LAN8820i

56 PIN QFN

(TOP VIEW)

25

24

23

22

21

20

19

18

17

16

15

VSS

NOTE:

Exposed pad (VSS) on bottom of package must be connected to ground



2009-2015 Microchip Technology Inc.

DS00001871B-page 5

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