SR1
4 pin Smart Reset™
Datasheet
-
production data
Applications
Wearable
Activity tracker
Smartwatch
Smartglasses
UDFN6 (1.00 x 1.45 mm)
Features
Operating voltage range 2 V to 5.5 V
Low supply current 1 µA
Integrated test mode
Single Smart Reset™ push-button input with
fixed extended reset setup delay (t
SRC
) from
0.5 s to 10 s in 0.5 s steps (typ.), option with
internal input pull-up resistor
Push-button controlled reset pulse duration
– Option 1: fully push-button controlled, no
fixed or minimum pulse width guaranteed
– Option 2: defined output reset pulse
duration (t
REC
), factory-programmed
Single reset output
– Active low or active high
– Push-pull or open drain with optional pull-
up resistor
Fixed Smart Reset input logic voltage levels
Operating temperature: -40 °C to +85 °C
UDFN6 package 1.00 mm x 1.45 mm
ECOPACK
®
2 (RoHS compliant, Halogen-
Free)
May 2014
This is information on a product in full production.
DocID026048 Rev 2
1/21
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Contents
SR1
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
3
Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
3.2
3.3
3.4
3.5
3.6
Power supply (V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Power-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ground (V
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Smart Reset input (SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Reset output (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
RST output undervoltage behavior (for open-drain option) . . . . . . . . . . . . 6
4
5
6
7
8
9
10
11
12
13
Typical application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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DocID026048 Rev 2
SR1
Description
1
Description
The Smart Reset
TM
devices provide a useful feature which ensures that inadvertent short
reset push-button closures do not cause system resets. This is done by implementing an
extended Smart Reset input delay time (t
SRC
), which ensures a safe reset and eliminates
the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to distinguish
between a software generated interrupt and a hard system reset. When the input push-
button is connected to the microcontroller interrupt input, and is closed for a short time, the
processor can only be interrupted. If the system still does not respond properly, continuing
to keep the push-button closed for the extended setup time t
SRC
causes a hard reset of the
processor through the reset output.
The SR1 has one Smart Reset input (SR) with preset delayed Smart Reset setup time
(t
SRC
). The reset output (RST) is asserted after the Smart Reset input is held active for the
selected t
SRC
delay time. The RST output remains asserted either until the SR input goes to
inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output
reset pulse duration is fixed for t
REC
(i.e. factory-programmed). The device fully operates
over a broad V
CC
range from 2.0 V to 5.5 V.
1.1
Test mode
After pulling SR up to V
TEST
(V
CC
+ 1.4 V) or above, the counter starts to count the initial
shortened t
SRC-INI
(42 ms, typ.). After t
SRC-INI
expires, the RST output either goes down for
t
REC
(if t
REC
option is used) or stays low as long as overvoltage on SR is detected (if t
REC
option is not used). This is feedback, and the user only knows that the device is locked in
test mode. Each time the SR input is connected to ground in test mode, a shortened
t
SRC-SHORT
(t
SRC
/128) is used instead of regular t
SRC
(0.5 s - 10 s). In this way the device
can be quickly tested without repeating test mode triggering. Return to normal mode is
possible by performing a new startup of the device (i.e. V
CC
goes to 0 V and back to its
original state).
The advantages of this solution are its high glitch immunity, user feedback regarding entry
into test mode, and testability within the full V
CC
range.
DocID026048 Rev 2
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21
Description
SR1
1.2
Logic diagram
Figure 1. SR1 logic diagram
1.3
Pin connections
Figure 2. UDFN6 pin connections (top view)
NC(1)
NC(1)
VCC
RST
VSS
SR
1
2
3
UDFN6
6
SR1
5
4
AM07463v2
1. Not connected (not bonded); should be connected to V
SS
.
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DocID026048 Rev 2
SR1
Device overview
2
Device overview
Table 1. Signal names
Pin n°
1
2
3
4
5
6
Name
RST
V
SS
SR
V
CC
NC
NC
Type
Output
Supply ground
Input
Supply voltage
-
-
Description
Reset output, active low, open drain.
Ground
Smart Reset input, active low.
Positive supply voltage for the device. A 0.1 µF decoupling
ceramic capacitor is recommended to be connected between
V
CC
and V
SS
pins.
Not connected (not bonded); should be connected to V
SS
.
Not connected (not bonded); should be connected to V
SS
.
Figure 3. SR1 block diagram
DocID026048 Rev 2
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