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Data Sheet
PT7M8424
Dual LDO Regulators
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Description
The PT7M8424 series are highly accurate, dual, low
dropout voltage regulators with low noise, high ripple
rejection and low current consumption.
The PT7M8424 includes a reference voltage source, error
amplifiers, driver transistors, individual enable inputs,
current limit protections, short circuit protections,
thermal shutdown protection and internal phase
compensators.
The output voltage for each regulator is set by factory
trimming within a range of 1.2V to 4.5V in 100mV step.
The PT7M8424 series are stable with low ESR ceramic
capacitors. The PT7M8424 series are available in the
SOT23-6L package.
Output Current: 200mA or more
Dropout Voltage: 150mV@200mA
Operating Voltage Range: 1.8V-5.5V
Output Voltage Range: 1.2V-4.5V(100 mV Step)
High Accuracy:
±2.0%
Low Power Consumption: 55 µA
Standby Current: 0.1µA
High Ripple Rejection: 70dB@ 1kHz
Output Current-Limit Protection
Short Circuit Protection
Optional Auto Output Discharge
Operating Temperature Range: -40℃-+85℃
Low ESR Capacitor Compatible: Ceramic Capacitor
Thermal Shutdown Protection
Package: SOT23-6L
Application
•
•
•
•
•
•
Ordering Information
Part Number
PT7M8424①②③④⑤
⑥
TA6E
Package
Lead free and
Green SOT23-6L
Mobile phones (PDC, GSM, CDMA, IMT2000 etc.)
Cordless phones and radio communication
equipment
Digital still cameras and video cameras
PDAs
MP3 players
Portable devices
Note: “
①②③④⑤
⑥
” refer to different functions. See
below Table 1.
Table 1 PT7M8424 Options
Designator Symbol
Description
AA
High active with pull-down
①②:
resistor, with auto output discharge
Regulators
BB
High active without pull-down
1 and 2
resistor, with auto output discharge
EN type
CC
Low active with pull-up resistor,
with auto output discharge
DD
Low active without pull-up resistor,
with auto output discharge
EE
High active with pull-down
resistor, without auto output
discharge
FF
High active without pull-down
resistor, without auto output
discharge
GG
Low active with pull-up resistor,
without auto output discharge
HH
Low active without pull-up resistor,
without auto output discharge
Designator
③④
Regulator 1
Output
voltage
Symbol
Description
12-45
Internally set sequential number
relating output voltage of regulator 1
Regulator 1 Output Voltage Range:
1.2~ 4.5V, the detail is in Table 2.
2A
⑤
⑥
Regulator 2
Output
voltage
12-45
Internally set sequential number
relating output voltage of regulator
2
Regulator 2 Output Voltage Range:
1.2~ 4.5V, the detail is in Table 2.
2A
PT0329 (02/09)
1
Ver: 0
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Data Sheet
PT7M8424
Dual LDO Regulators
Designator
41
42
43
44
45
2A
V
OUT1
or
V
OUT2
(V)
4.1
4.2
4.3
4.4
4.5
2.85
Table 2 Sequential Number Description
V
OUT1
or
Designator
Designator
V
OUT2
(V)
21
12
1.2
22
13
1.3
23
14
1.4
24
15
1.5
25
16
1.6
26
17
1.7
27
18
1.8
28
19
1.9
29
20
2.0
30
V
OUT1
or
V
OUT2
(V)
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
Designator
31
32
33
34
35
36
37
38
39
40
V
OUT1
or
V
OUT2
(V)
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
Pin Assignment
SOT23-6L
VOUT1
VIN
VOUT2
1
2
3
6
5
4
EN1
GND
EN2
Pin Description
Pin No.
1
2
3
4
5
6
Pin Name
VOUT1
VIN
VOUT2
EN2
GND
EN1
Description
Output of Regulator 1. Bypass with a 1µF ceramic capacitor (X5R/X7R) to
GND.
Regulators Supply Input. Supply voltage can range from 1.8V to 5.5V.
Bypass with a 1µF ceramic capacitor (X5R/X7R) to GND.
Output of Regulator 2. Bypass with a 1µF ceramic capacitor (X5R/X7R) to
GND.
ON/OFF Control of Regulator 2.
Ground.
ON/OFF Control of Regulator 1.
PT0329 (02/09)
2
Ver: 0
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Data Sheet
PT7M8424
Dual LDO Regulators
Functional Description
(Refer to Block Diagram)
Output Voltage
The divided output voltage is compared with the internal reference voltage by the error amplifier with internal phase compensator.
The output of the error amplifier then drives the P-channel MOSFET to maintain a stable and constant output voltage.
Low ESR Capacitors
The internal phase compensator maintains the stable output voltage with low ESR ceramic input and output capacitors. 1µF low
ESR (X5R/X7R) ceramic capacitors located as close as possible to the IC’s pins is recommended.
Current Limit , Short Circuit Protection and Thermal Shutdown Protection
Current limit protection is used to limit the output current when an overload condition occurs. As a result, the output voltage will
drop. When the overload condition is getting worse and the output voltage is close to ground, the short circuit protection will
further reduce the output current to a very low level to reduce the power dissipation in the IC.
Thermal shutdown protection will
turn off the output to reduce the power dissipation when the operation junction temperature exceeds 160°C.
EN Pins
The outputs of the two regulators can be controlled independently with the EN1 and EN2 pins. When a regulator is disabled, the
output voltage is discharged by internal feedback resistor and the circuitry of the regulator will not consume power. In the IC with
auto output discharge option, the output voltage is also discharged quickly by a pull-low transistor. For the IC with EN type of
“without pull-up/down resistor”, the EN pin should be connected to a “VIN” or a “GND” voltage as a floating input applied to
inverter input of the enable circuitry will increase the current consumption.
NOTE ON USE
Please use this IC within the stated absolute maximum ratings.
Where wiring impedance is high, operations may become unstable due to noise and/or phase lag depending on output current.
Please keep the resistance low between VIN and GND wiring in particular.
Please wire the input capacitor (C
IN
) and the output capacitors (C
OUT1
, C
OUT2
) as close to the IC as possible.
1.
2.
3.
Maximum Ratings
Storage Temperature………………………………………….. - 55
o
C to +125
o
C
Ambient Temperature with Power Applied..................................-40oC to +85oC
Input Voltage …………………………………………….…….................. +6.0V
Output Voltage …………………………………………….…- 0.3 to V
CC
+0.3V
EN pin Voltage …………………………………………………………….+6.0V
DC Input/Output Current ………………………………………………...700mA
Power Dissipation………………………………………………………..250mW
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
PT0329 (02/09)
3
Ver: 0
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Data Sheet
PT7M8424
Dual LDO Regulators
Electrical Characteristics
Regulator 1, Regulator 2
T
A
=25℃
PARAMETER
Output Voltage
Maximum Output
Current
Load Regulation
SYMBOL
V
OUT(E)
I
OUTMAX
∆V
OUT
Vdif1
Dropout Voltage
Vdif2
Supply Current
Standby Current
Line Regulation
Input Voltage
Output Voltage
Temperature
Characteristic
Ripple Rejection
Current Limit
Short-Circuit Current
Thermal shutdown
Thermal Shutdown
Hysteresis
EN”High”Voltage
EN”Low”Voltage
EN”High”Current
EN”Low” Current
Pull-Down or Push-Up
Resistance for EN Pin
Low Output Nch Tr. ON
Resistance
Note:
I
SS
I
STB
∆V
OUT
/
∆V
IN
*V
OUT
V
IN
∆V
OUT
/
∆Topr*V
OUT
PSRR
Ilim
Ishort
TSD
△TSD
V
ENH
V
ENL
I
ENH
I
ENL
R
PD
R
LOW
V
IN
= V
OUT(T)
+1.0V
V
EN
= 0V
CONDITIONS
V
IN
=V
OUT(T)
+1.0V
I
OUT
=30mA
V
IN
=V
OUT(T)
+1.0V
1mA≤I
OUT
≤200mA
1.7V≤V
OUT(T)
≤1.8V
I
OUT
= 30mA
1.9V≤V
OUT(T)
≤2.7V
2.8V≤V
OUT(T)
≤4.5V
1.7V≤V
OUT(T)
≤1.8V
I
OUT
=
1.9V≤V
OUT(T)
≤2.7V
200mA
2.8V≤V
OUT(T)
≤4.5V
V
IN
= V
OUT(T)
+1.0V
I
OUT
=0 mA
V
IN
= V
OUT(T)
+1.0V
V
EN
=0V
V
OUT(T)
+1.0V≤V
IN
≤6.0V
V
EN
=V
IN
，I
OUT
=30 mA
I
OUT
=30 mA
-40℃≤Topr≤85℃
V
IN
=[V
OUT(T)
+1.0]V
DC
+1Vp-p AC
I
OUT
=30mA, f=1kHz
V
IN
= V
OUT(T)
+1.0V
V
EN
=V
IN
V
IN
=V
OUT(T)
+1.0V
V
EN
=V
IN
MIN
V
OUT(T)
*
0.98
200
-
-
-
-
-
-
-
-
-
-
1.8
-
-
-
-
-
-
1.5
-
-0.10
-0.10
0.5
-
TYP
V
OUT(T)
-
30
0.05
0.03
0.02
0.30
0.19
0.15
55
0.1
0.05
-
+100
70
300
50
160
20
-
-
-
-
1.0
500
MAX
V
OUT(T)
*1.02
-
60
0.10
0.06
0.04
0.60
0.38
0.30
85
1
0.20
5.5
-
-
-
-
-
-
-
0.3
0.10
0.10
2.0
-
℃
V
V
µA
µA
MΩ
Ω
UNIT
S
V
mA
mV
V
V
µA
µA
%/V
V
ppm/
℃
dB
mA
mA
V
IN
= V
OUT(T)
+1.0V
V
IN
= V
OUT(T)
+1.0V
V
EN
= 0V
*1 : V
OUT(T)=
Specified output voltage
*2 : V
OUT(E)=
Effective output voltage
(I.e. the output voltage when "V
OUT(T)
＋1.0V"
is provided at the V
IN
pin while maintaining a certain I
OUT
value).
*3 : Vdif={V
IN1
(*5)
-V
OUT1
(*4)
}
*4 : V
OUT1
=A voltage equal to 98% of the output voltage whenever an amply stabilized I
OUT
{V
OUT(T)+
1.0V} is input.
*5 : V
IN1
=The input voltage when V
OUT1
appears as input voltage is gradually decreased.
*6 : Unless otherwise stated, V
IN
=V
OUT(T)+
1.0V
PT0329 (02/09)
4
Ver: 0
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Data Sheet
PT7M8424
Dual LDO Regulators
Block Diagram
EN1
Current Limit and
Thermal Shutdown
VOUT1
VIN
Voltage
reference
Shutdown and
Logic Control
VOUT2
Current Limit and
Thermal Shutdown
GND
Shutdown and
Logic Control
EN2
Application Circuit
U1
1
VOUT1
EN1
6
2
Cin
3
Cout2
1uF
VIN
GND
5
power supply
VOUT2
EN2
4
PT7M8424 SOT23-6L
PT0329 (02/09)
5
Ver: 0
FPGA/CPLD
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