S i 3 4 0 2 -B
F
U LL Y
-
IN TE GRA TE D
8 0 2 . 3 -
C O M P L I A N T
P
O
E P D I
N T E R F A C E
AND
L
O W
- E M I S
W I TCH IN G
R
EG U LA TO R
Features
VPOSS
16
Pin-compatible replacement for
the obsolete Si3402-A
IEEE 802.3 standard-compliant
solution, including pre-standard
(legacy) PoE support
Highly-integrated IC enables
compact solution footprints
Minimal external components
Integrated diode bridges and
transient surge suppressor
Integrated switching regulator
controller with on-chip power
FET
Integrated dual current-limited
hotswap switch
Programmable classification
circuit
Incorporates switcher EMI-
reduction techniques.
Supports non-isolated and
isolated switching topologies
Comprehensive protection
circuitry
Transient overvoltage
protection
Undervoltage lockout
Early power-loss indicator
Thermal shutdown protection
Foldback current limiting
Low-profile 5 x 5 mm 20-pin QFN
RoHS-compliant
Ordering Information:
See page 18.
Pin Assignments
5 x 5 mm QFN
(Top View)
VSSA
15
VSS2
Applications
20
19
18
17
Voice over IP telephones and
adapters
Wireless access points
Security cameras
Point-of-sale terminals
Internet appliances
Network devices
High power applications
EROUT
SSFT*
VDD
1
2
3
VSS1
SWO
FB
14
CT1
VNEG
(PAD)
13
CT2
12
11
VPOSF
SP1
ISOSSFT*
4
VNEG
PLOSS
RDET
The Si3402 integrates all power management and control functions required in a
Power-over-Ethernet (PoE) powered device (PD) application. The Si3402
converts the high voltage supplied over the 10/100/1000BASE-T Ethernet
connection into a regulated, low-voltage output supply. The optimized architecture
of the Si3402 minimizes the solution footprint, reduces external BOM cost, and
enables the use of low-cost external components while maintaining high
performance. The Si3402 integrates the required diode bridges and transient
surge suppressor, thus enabling direct connection of the IC to the Ethernet RJ-45
connector. The switching power FET and all associated functions are also
integrated. The integrated switching regulator supports isolated (flyback) and non-
isolated (buck) converter topologies. The Si3402 supports IEEE 802.3at Type 1
Powered Device applications. Standard external resistors connected to the
Si3402 provide the proper 802.3 signatures for the detection function and
programming of the classification mode. Startup circuits ensure well-controlled
initial operation of both the hotswap switch and the voltage regulator. The Si3402
is available in a low-profile, 20-pin, 5 x 5 mm QFN package. The Si3402 is
designed for IEEE 802.3at Type 1 (Class 3 and below) applications. The Si3402-B
is a pin-compatible replacement of the obsolete Si3402-A. PCB layouts designed
for Si3402-A can be reused with Si3402-B, but some component value changes
are required.
Note:
Original pin names shown for compatibil-
ity reasons, but SSFT, ISOSSFT, VPOSS,
and VSS1 are not internally connected.
Rev. 1.0 11/15
Copyright © 2015 by Silicon Laboratories
HSO
RCL
SP2
Description
5
6
7
8
9
10
Si3402-B
Si3402-B
Functional Block Diagram
VPOSF VPOSS*
RDET
RCL
SSFT*
VDD
IS O S S F T *
Rectification
CT1
CT2
SP1
SP2
Protection
D e te c tio n
&
C la s s ific a tio n
H o ts w a p
S w itc h
&
C u rre n t lim it
H o ts w a p
C o n tro l
&
Com m on
B ia s
P W M C o n tro l
and EM I
L im itin g
EROUT
FB
&
S w itc h in g
FET
SW O
VNEG
HSO
PLO SS VSSA
VSS1*
VSS2
N o te
: O rig in a l p in n a m e s s h o w n fo r c o m p a tib ility re a s o n s, b u t S S F T , IS O S S F T ,
V P O S S , a n d V S S 1 a re n o t in te rn a lly c o n n e c te d.
2
Rev. 1.0
Si3402-B
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2. PD Hotswap Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3. Switching Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6. Recommended Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8. Device Marking Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Rev. 1.0
3
Si3402-B
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Description
|CT1 – CT2| or |SP1 – SP2|
Ambient Operating Temperature
Symbol
VPORT
TA
Min
2.8
–40
Typ
—
25
Max
57
85
Units
V
°C
Note:
Unless otherwise noted, all voltages referenced to VNEG. All minimum and maximum specifications are guaranteed
and apply across the recommended operating conditions. Typical values apply at nominal supply voltage and ambient
temperature unless otherwise noted.
Table 2. Absolute Maximum Ratings
1
Type
CT1 to CT2
2
SP1 to SP2
2
VPOS
HSO
Voltage
V
SS1
, V
SS2
, or V
SSA
V
SS1
to V
SS2
or V
SSA
SWO
3
PLOSS to VPOS
RDET
VDD to VSS1, VSS2, or VSSA
Peak Current
DC Current
4
Ambient Temperature
CT1, CT2, SP1, SP2
2
VPOS
2
CT1,CT2,SP1,SP2
Storage
Operating
Description
Rating
–100 to 100
–100 to 100
–0.7 to 100
–0.7 to 100
–0.7 to 100
–0.3 to 0.3
–0.7 to 100
–100 to 0.7
–0.7 to 100
–0.3 to 5.5
–5 to 5
–5 to 5
–0.2 to 0.2
–65 to 150
–40 to 85
A
A
°C
V
Unit
Notes:
1.
Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum
ratings are exceeded. Functional operation should be restricted to those conditions specified in the operational
sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect
device reliability.
2.
Transient surge is defined in IEC60060 as a 1000 V impulse of either polarity applied across CT1–CT2 or SP1–SP2.
The shape of the impulse shall have a 300 ns full rise time and a 50 µs half fall time, with 201
source impedance.
3.
SWO is referenced to V
SS2
.
4.
Higher dc current is possible in the application, but only utilizing external bridge diodes. Refer to reference design
documentation for further detail.
4
Rev. 1.0
Si3402-B
Table 3. Surge Immunity Ratings
1,2,3
Type
CDE
4
ESD (System-Level)
Contact discharge (IEC 61000-4-2)
ESD (CDM)
ESD (HBM)
Telephony Voltage
Compatibility
JEDEC (JESD22-C101C)
JEDEC (JESD22-A114E)
IEEE 802.3, Clause 33.5.6
–8 to 8
–750 to 750
–2000 to 2000
175
kV
V
V
Vp
Description
Cable discharge event tolerance
Air discharge (IEC 61000-4-2)
Rating
–3.5 to 3.5
–16.5 to 16.5
Unit
kV
kV
Notes:
1.
Permanent device damage may occur if the maximum ratings are exceeded. Functional operation should be restricted
to those conditions specified in the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may adversely affect device reliability.
2.
For more information regarding system-level surge tolerance, refer to “AN315: Robust Electrical Surge Immunity for
PoE PDs through Integrated Protection”.
3.
Designs must be compliant with the PCB layout and external component recommendations outlined in the Si3402 EVB
User Guide and application note, “AN956: Using the Si3402-B PoE PD Controller in Isolated and Non-Isolated
Designs”.
4.
J. Deatherage and D. Jones, “Multiple Factors Trigger Cable Discharge Events in Ethernet LANs,” Electronic Design
Dec. 4, 2000.
Rev. 1.0
5
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