Si88x2x
D
U A L
D
IGITAL
I
SOLATORS
Features
WITH
DC-DC C
ONVERTER
High-speed isolators with
integrated dc-dc converter
Fully-integrated secondary sensing
feedback-controlled converter with
dithering for low EMI
dc-dc converter peak efficiency of
83% with external power switch
Up to 5 W isolated power with
external power switch
Options include dc-dc shutdown,
frequency control, and soft start
Standard Voltage Conversion
3/5 V to isolated 3/5 V
24 V to isolated 3/5 V supported
Precise timing on digital isolators
0–100 Mbps
18 ns typical prop delay
Highly-reliable: 100 year lifetime
High electromagnetic immunity and
ultra-low emissions
RoHS compliant packages
SOIC-20 wide body
SOIC-16 wide body
Isolation of up to 5000 Vrms
High transient immunity of
100 kV/µs (typical)
AEC-Q100 qualified
Wide temp range
–40 to +125 °C
Ordering Information:
See page 36.
Pin Assignments
See page 31
GNDP
RSN
ESW
1
2
20
19
GNDB
VDDB
VREGB
NC
VSNS
COMP
NC
NC
B1
B2
Applications
Industrial automation systems
Hybrid electric and electric
vehicles
Isolated power supplies
Inverters
Data acquisition
Motor control
PLCs, distributed control systems
VDDA
GNDA
VREGA
SH_FC
SS
Isolation Barrier
3
4
5
6
7
8
9
HF
XMTR
18
17
16
15
14
13
HF
RCVR
Safety Approval (Pending)
A1
12
11
UL 1577 recognized
Up to 5000 Vrms for 1 minute
CSA component notice 5A
approval
VDE certification conformity
VDE0884-10
CQC certification approval
GB4943.1
A2
10
HF
XMTR
HF
RCVR
Si88620
Patents pending
Description
The Si88xx integrates Silicon Labs’ proven digital isolator technology with an
on-chip isolated dc-dc converter that provides regulated output voltages of
3.3 or 5.0 V (or >5 V with external components) at peak output power levels
of up to 5 W. These devices provide up to two digital channels. The dc-dc
converter has user-adjustable frequency for minimizing emissions, a soft-start
function for safety, a shutdown option and loop compensation. The device
requires only minimal passive components and a miniature transformer.
The ultra-low-power digital isolation channels offer substantial data rate,
propagation delay, size and reliability advantages over legacy isolation
technologies. Data rates up to 100 Mbps max are supported, and all devices
achieve propagation delays of only 23 ns max. Ordering options include a
choice of dc-dc converter features, isolation channel configurations and a fail-
safe mode. All products are certified by UL, CSA, VDE, and CQC.
Rev. 0.5 7/15
Copyright © 2015 by Silicon Laboratories
Si88x2x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si88x2x
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2. Digital Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3. DC-DC Converter Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.4. Transformer Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3. Digital Isolator Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
3.2. Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3. Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4. Fail-Safe Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.5. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6. Package Outline: 20-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7. Land Pattern: 20-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
8. Package Outline: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
9. Land Pattern: 16-Pin Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
10. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10.1. Si88x2x Top Marking (20-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10.2. Top Marking Explanation (20-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 43
10.3. Si88x2x Top Marking (16-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . 44
10.4. Top Marking Explanation (16-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 44
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Rev. 0.5
2
Si88x2x
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Ambient Operating Temperature
Power Input Voltage
Supply Voltage
Symbol
T
A
VDDP
VDDA
VDDB
Min
–40
3.0
3.0
3.0
Typ
25
—
—
—
Max
125
5.5
5.5
5.5
Unit
°C
V
V
V
Table 2. Electrical Characteristics
1
V
IN
= 24 V; V
DDA
= V
DDP
= 3.0 to 5.5 V (see Figure 2) for all Si8822x/32x; V
DDA
= 4.3 V (see Figure 3) for all Si8842x/62x;
T
A
= –40 to 125 °C unless otherwise noted.
Parameter
DC/DC Converter
Switching Frequency
Si8822x, Si8842x
Switching Frequency
Si8832x, Si8862x
Symbol
Test Condition
Min
Typ
Max
Unit
FSW
FSW
RFSW = 23.3 k
FSW = 1025.5/(RFSW x CSS)
CSS = 220 nF (see Figure 9)
(1% tolerance on BOM)
RFSW = 9.3 k
FSW = 1025.5/(RFSW x CSS)
CSS = 220 nF (see Figure 9)
(1% tolerance on BOM)
RFSW = 5.18 k,
CSS
=
220 nF (see Figure 9)
180
250
200
220
kHz
kHz
450
500
550
kHz
810
1.002
–500
900
1.05
—
—
990
1.097
500
+5
kHz
V
nA
%
VSNS voltage
VSNS current offset
Output Voltage
Accuracy
2
VSNS
I
offset
ILOAD = 0 A
See Figure 2
ILOAD = 0 mA
–5
Notes:
1.
Over recommended operating conditions as noted in Table 1.
2.
VOUT = VSNS x (1 + R1/R2) + R1 x I
offset
3.
VDDP current needed for dc-dc circuits.
4.
VDDA current needed for dc-dc circuits.
5.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6.
tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7.
Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
Rev. 0.5
3
Si88x2x
Table 2. Electrical Characteristics
1
(Continued)
V
IN
= 24 V; V
DDA
= V
DDP
= 3.0 to 5.5 V (see Figure 2) for all Si8822x/32x; V
DDA
= 4.3 V (see Figure 3) for all Si8842x/62x;
T
A
= –40 to 125 °C unless otherwise noted.
Parameter
Line Regulation
Symbol
VOUT(line)/VDDP
Test Condition
See Figure 2
ILOAD = 50 mA
VDDP varies from 4.5 to 5.5 V
See Figure 2
ILOAD = 50 to 400 mA
ILOAD = 100 mA
See Figure 2
See Figure 3
Min
Typ
1
Max
Unit
mV/V
Load Regulation
Output Voltage
Ripple
Si8822x, Si8832x
Si8842x, Si8862x
Turn-on overshoot
VOUT(load)/VOUT
0.1
100
%
mV p-p
VOUT(start)
See Figure 2
CIN = COUT = 0.1
μF
in
parallel with 10
μF,
ILOAD = 0 A
See Figure 2
2
%
Continuous Output
Current
Si8822x, Si8832x
5.0 V to 5.0 V
3.3 V to 3.3 V
3.3 V to 5.0 V
5.0 V to 3.3 V
Si8842x, Si8862x
24.0 to 5.0 V
24.0 to 3.3 V
Cycle-by-cycle aver-
age current limit
Si8822x, Si8832x
No Load Supply Cur-
rent IDDP
Si8822x, Si8832x
No Load Supply Cur-
rent IDDA
Si8822x, Si8832x
ILOAD(max)
mA
400
400
250
550
1000
1500
ILIM
See Figure 2
Output short circuited
See Figure 2
VDDP = VDDA = 5 V
See Figure 2
VDDP = VDDA = 5 V
3
A
IDDPQ_DCDC
3
30
mA
IDDAQ_DCDC
4
5.7
mA
Notes:
1.
Over recommended operating conditions as noted in Table 1.
2.
VOUT = VSNS x (1 + R1/R2) + R1 x I
offset
3.
VDDP current needed for dc-dc circuits.
4.
VDDA current needed for dc-dc circuits.
5.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6.
tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7.
Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
4
Rev. 0.5
Si88x2x
Table 2. Electrical Characteristics
1
(Continued)
V
IN
= 24 V; V
DDA
= V
DDP
= 3.0 to 5.5 V (see Figure 2) for all Si8822x/32x; V
DDA
= 4.3 V (see Figure 3) for all Si8842x/62x;
T
A
= –40 to 125 °C unless otherwise noted.
Parameter
No Load Supply Cur-
rent IDDP
Si8842x, Si8862x
No Load Supply Cur-
rent IDDA
Si8842x, Si8862x
Peak Efficiency
Si8822x, Si8832x
Si8842x, Si8862x
Voltage Regulator
Reference Voltage
Si8842x, Si8862x
VREG tempco
VREG input current
Soft start time,
full load
Si8822x, Si8842x
Si8832x, Si8862x
Restart Delay from
fault event
Digital Isolator
VDD Undervoltage
Threshold
VDD Undervoltage
Threshold
VDD Undervoltage
Hysteresis
Positive-Going Input
Threshold
Symbol
IDDPQ_DCDC
3
Test Condition
See Figure 3
VIN = 24 V
See Figure 3
VIN = 24 V
Min
Typ
0.8
Max
Unit
mA
IDDAQ_DCDC
4
5.8
mA
See Figure 2
See Figure 3
VREGA, VREGB
I
REG
= 600 µA
See Figure 24 for typical I–V
curve
78
83
4.8
%
V
K
TVREG
I
REG
t
SST
See Figures 19–22 for typical
soft start times over load con-
ditions.
350
–0.43
—
950
mV/°C
µA
ms
25
50
21
s
tOTP
VDDUV+
VDDUV–
VDD
HYS
VT+
VDDA, VDDB rising
VDDA, VDDB falling
2.7
2.6
100
V
V
mV
V
All inputs rising
1.67
Notes:
1.
Over recommended operating conditions as noted in Table 1.
2.
VOUT = VSNS x (1 + R1/R2) + R1 x I
offset
3.
VDDP current needed for dc-dc circuits.
4.
VDDA current needed for dc-dc circuits.
5.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6.
tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7.
Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
Rev. 0.5
5
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
