Si88x4x
Q
U A D
D
IGITAL
I
SOL A TORS W I T H
DC-DC C
O N V E RT E R
Features
High-speed isolators with
integrated dc-dc converter
Fully-integrated secondary sensing
feedback-controlled converter with
dithering for low EMI
dc-dc converter peak efficiency of
83% with external power switch
Up to 5 W isolated power with
external power switch
Options include dc-dc shutdown,
frequency control, and soft start
Standard Voltage Conversion
3/5 V to isolated 3/5 V
24 V to isolated 3/5 V supported
Precise timing on digital isolators
0–100 Mbps
18 ns typical prop delay
Highly-reliable: 100 year lifetime
High electromagnetic immunity and
ultra-low emissions
RoHS compliant packages
SOIC-20 wide body
SOIC-24 wide body
Isolation of up to 5000 Vrms
High transient immunity of
100 kV/µs (typical)
AEC-Q100 qualified
Wide temp range
–40 to +125 °C
Ordering Information:
See page 38.
Pin Assignments
See page 33
GNDP
VSW
VDDP
1
2
20
19
GNDB
VDDB
DNC
NC
VSNS
COMP
B1
B2
B3
B4
Applications
Industrial automation systems
Hybrid electric and electric
vehicles
Isolated power supplies
Inverters
Data acquisition
Motor control
PLCs, distributed control systems
VDDA
GNDA
SH
A1
Isolation Barrier
3
4
5
6
7
8
9
10
HF
XMTR
18
17
16
15
HF
RCVR
14
13
12
11
Safety Approval (Pending)
A2
HF
XMTR
HF
RCVR
UL 1577 recognized
Up to 5000 Vrms for 1 minute
CSA component notice 5A
approval
VDE certification conformity
VDE 0884-10
CQC certification approval
GB4943.1
A3
A4
HF
XMTR
HF
RCVR
HF
XMTR
HF
RCVR
Si88240
Patents pending
Description
The Si88xx integrates Silicon Labs’ proven digital isolator technology with an
on-chip isolated dc-dc converter that provides regulated output voltages of
3.3 or 5.0 V (or >5 V with external components) at peak output power levels
of up to 5 W. These devices provide up to four digital channels. The dc-dc
converter has user-adjustable frequency for minimizing emissions, a soft-start
function for safety, a shut-down option and loop compensation. The device
requires only minimal passive components and a miniature transformer.
The ultra-low-power digital isolation channels offer substantial data rate,
propagation delay, size and reliability advantages over legacy isolation
technologies. Data rates up to 100 Mbps max are supported, and all devices
achieve propagation delays of only 23 ns max. Ordering options include a
choice of dc-dc converter features, isolation channel configurations and a fail-
safe mode. All products are certified by UL, CSA, VDE, and CQC.
Preliminary Rev. 0.6 7/15
Copyright © 2015 by Silicon Laboratories
Si88x4x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si88x4x
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2. Digital Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3. DC-DC Converter Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.4. Transformer Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3. Digital Isolator Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
3.2. Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3. Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4. Fail-Safe Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.5. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6. Package Outline: 20-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7. Land Pattern: 20-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
8. Package Outline: 24-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
9. Land Pattern: 24-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
10. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
10.1. Si88x4x Top Marking (20-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . 45
10.2. Top Marking Explanation (20-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 45
10.3. Si88x4x Top Marking (24-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . 46
10.4. Top Marking Explanation (24-Pin Wide Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 46
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
2
Preliminary Rev. 0.6
Si88x4x
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Ambient Operating Temperature*
Power Input Voltage
Supply Voltage
Symbol
T
A
VDDP
VDDA
VDDB
Min
–40
3.0
3.0
3.0
Typ
25
—
—
—
Max
125
5.5
5.5
5.5
Unit
°C
V
V
V
*Note:
The maximum ambient temperature is dependent on data frequency, output loading, number of operating channels,
and supply voltage.
Table 2. Electrical Characteristics
1
V
IN
= 24 V; V
DDA
= 4.3 V (see Figure 3) for all Si8844x/64x; V
DDA
= V
DDP
= 3.0 to 5.5 V (see Figure 2) for all Si8824x/34x;
T
A
= –40 to 125 °C unless otherwise noted
Parameter
DC/DC Converter
Switching Frequency
Si8824x, Si8844x
Switching Frequency
Si8834x, Si8864x
Symbol
Test Condition
Min
Typ
Max
Unit
FSW
FSW
RFSW = 23.3 k
FSW = 1025.5/(RFSW x CSS)
CSS = 220 nF (see Figure 9)
(1% tolerance on BOM)
RFSW = 9.3 k
FSW = 1025.5/(RFSW x CSS)
CSS = 220 nF (see Figure 9)
(1% tolerance on BOM)
RFSW = 5.18 k,
CSS
= 220 nF
(see Figure 9)
180
250
200
220
kHz
kHz
450
500
550
kHz
810
1.002
–500
900
1.05
—
990
1.097
500
kHz
V
nA
VSNS voltage
VSNS current offset
VSNS
I
offset
ILOAD = 0 A
Notes:
1.
Over recommended operating conditions as noted in Table 1.
2.
VOUT = VSNS x (1 + R1/R2) + R1 x I
offset
3.
VDDP current needed for dc-dc circuits.
4.
VDDA current needed for dc-dc circuits.
5.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6.
tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7.
Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
Preliminary Rev. 0.6
3
Si88x4x
Table 2. Electrical Characteristics
1
(Continued)
V
IN
= 24 V; V
DDA
= 4.3 V (see Figure 3) for all Si8844x/64x; V
DDA
= V
DDP
= 3.0 to 5.5 V (see Figure 2) for all Si8824x/34x;
T
A
= –40 to 125 °C unless otherwise noted
Parameter
Output Voltage
Accuracy
2
Line Regulation
Symbol
Test Condition
See Figure 2
ILOAD = 0 mA
Min
–5
Typ
—
1
Max
+5
Unit
%
mV/V
VOUT(line)/V
DDP
VOUT(load)/V
OUT
See Figure 2
ILOAD = 50 mA
VDDP varies from 4.5 to 5.5 V
See Figure 2
ILOAD = 50 to 400 mA
ILOAD = 100 mA
See Figure 2
See Figure 3
Load Regulation
Output Voltage Ripple
Si8824x, Si8834x
Si8844x, Si8864x
Turn-on overshoot
0.1
100
%
mV p-p
VOUT(start)
See Figure 2
CIN = COUT = 0.1
μF
in
parallel with 10
μF,
ILOAD = 0 A
2
%
Continuous Output Current
Si8824x, Si8834x
5.0 V to 5.0 V
3.3 V to 3.3 V
3.3 V to 5.0 V
5.0 V to 3.3 V
Si8844x, Si8864x
24.0 to 5.0 V
24.0 to 3.0 V
Cycle-by-cycle average
current limit
Si8824x, Si8834x
No Load Supply Current
IDDP
Si8824x, Si8834x
No Load Supply Current
IDDA
Si8824x, Si8834x
ILOAD(max)
See Figure 2
400
400
250
550
1000
1500
3
mA
See Figure 3
ILIM
See Figure 2
Output short circuited
See Figure 2
VDDP = VDDA = 5 V
See Figure 2
VDDP = VDDA = 5 V
A
IDDPQ_DCDC
3
30
mA
IDDAQ_DCDC
4
5.7
mA
Notes:
1.
Over recommended operating conditions as noted in Table 1.
2.
VOUT = VSNS x (1 + R1/R2) + R1 x I
offset
3.
VDDP current needed for dc-dc circuits.
4.
VDDA current needed for dc-dc circuits.
5.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6.
tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7.
Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
4
Preliminary Rev. 0.6
Si88x4x
Table 2. Electrical Characteristics
1
(Continued)
V
IN
= 24 V; V
DDA
= 4.3 V (see Figure 3) for all Si8844x/64x; V
DDA
= V
DDP
= 3.0 to 5.5 V (see Figure 2) for all Si8824x/34x;
T
A
= –40 to 125 °C unless otherwise noted
Parameter
No Load Supply Current
IDDP
Si8844x, Si8864x
No Load Supply Current
IDDA
Si8844x, Si8864x
Peak Efficiency
Si8824x, Si8834x
Si8844x, Si8864x
Voltage Regulator Refer-
ence Voltage
Si8844x, Si8864x
VREG tempco
VREG input current
Soft Start Time, Full Load
Si8824x, Si8844x
Si8834x, Si8864x
Restart Delay from fault
event
Digital Isolator
VDD Undervoltage
Threshold
VDD Undervoltage
Threshold
VDD Undervoltage
Hysteresis
Positive-Going Input
Threshold
Symbol
IDDPQ_DCDC
3
Test Condition
See Figure 3
VIN = 24 V
See Figure 3
VIN = 24 V
See Figure 2, 3
Min
Typ
0.8
Max
Unit
mA
IDDAQ_DCDC
4
5.8
mA
%
78
83
VREGA,
VREGB
K
TVREG
I
REG
t
SST
I
REG
= 600 µA
See Figure 30 for typical I–V
curve
4.8
V
–0.43
350
See Figures 25 through 28 for
typical soft start times over
load conditions.
—
950
mV/°C
µA
ms
25
50
21
s
tOTP
VDDUV+
VDDUV–
VDD
HYS
VT+
VDDA, VDDB rising
VDDA, VDDB falling
2.7
2.6
100
V
V
mV
V
All inputs rising
1.67
Notes:
1.
Over recommended operating conditions as noted in Table 1.
2.
VOUT = VSNS x (1 + R1/R2) + R1 x I
offset
3.
VDDP current needed for dc-dc circuits.
4.
VDDA current needed for dc-dc circuits.
5.
The nominal output impedance of an isolator driver channel is approximately 50
,
±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6.
tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7.
Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
Preliminary Rev. 0.6
5
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