Freescale Semiconductor
Advance Information
Document Number: MC32BC3770
Rev. 1.0, 10/2015
2.0 A Switch-Mode Charger with
Intelligent Power-Path for 1-Cell
Li-Ion Battery
The BC3770 is a fully programmable switching charger with dual-path output for
single-cell Li-Ion and Li-Polymer battery. This dual-path output allows mobile
applications with fully discharged battery or dead battery to boot up the system.
High-efficiency and switch-mode operation of the BC3770 reduce heat
dissipation and allow for higher current capability for a given package size. In
addition, the BC3770 features single input with a 20 V withstanding input and
charges the battery with the current up to 2.0 A. The charging parameters and
operating modes are fully programmable over an I
2
C Interface that operates up
to 400 kHz.
The BC3770 is a highly integrated synchronous switch-mode charger, featuring
integrated OVP and Power FETs. The charger and boost regulator circuits
switch at 1.5 MHz to minimize the size of external passive components. The
BC3770 is able to operate as a boost regulator for USB-OTG function via either
I
2
C command or an external pin from the host/processor. The BC3770 is
available in a 25-bump, 2.27 mm x 2.17 mm, WLCSP package.
Features
•
•
•
•
•
•
•
•
•
•
Dual-path output to power-up system in dead battery
Single input for USB/TA
High-efficiency synchronous switching regulator
20 V maximum withstanding input voltage
Minimize the charging time with remote sense
Up to 2.0 A load current for system or battery
Programmable charge parameters via I
2
C compatible interface
400 kHz full-speed I
2
C interface
1.5 MHz switching frequency
Charge reduction mode for maximizing charging efficiency
BC3770
BATTERY CHARGER
CS SUFFIX
98ASA00848D
25 WLCSP
Applications
•
•
•
•
•
•
Internet of Things (IoT)
Handheld consumer devices
Wearable application
mPOS terminals
Medical portable equipment
Consumer tablets
BC3770
USB/TA
VBUS
D-
D+
ID
GND
PMID
VBUS
Charge
Detector
PGND
BOOT
LX
System
Load
VL
GND
System I/O
VIO
INT
INTB
SDA
SCL
VSYS
CHGOUT
SDA
SCL
MCU
GPIO
GPIO
ADC
BATREG
CHGENB
Optional
SHDNB
NOBAT
BATSNSN
+
VF
-
1-Cell
Li-Ion
Battery
connected on the PCB
Figure 1. BC3770 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2015. All rights reserved.
1
Orderable Parts
Table 1. Orderable Part Variations
Part Number
MC32BC3770CSR2
Temperature (T
A
)
-40 °C to 85 °C
Package
25 WLCSP, 2.27 mm x 2.17 mm, 0.4 pitch
BC3770
Analog Integrated Circuit Device Data
Freescale Semiconductor
2
2
Internal Block Diagram
Input
Current
Detect
Q1
(50m
Ω
)
VBUS
VBUS
Current
Path
Control
PMID
Q2
(50mΩ)
VL
BOOT
LX
LX
PGND
PGND
PWM
DRV
Q3
(70m
Ω
)
1.5 MHz
VL
GND
Internal
Regulator
PMID
Reduction
THR
VIO
INTB
SDA
SCL
FS I2C
Interface
Q4
(30mΩ)
VSYS
VSYS
VSYS
CHGOUT
CHGOUT
CHGOUT
I
Trickle
I2C bit,
SUSPEND=0
& CHGEN=1
I
prechg
Linear
CHGENB
Charger
Enabled
All other enable
conditions=1
BATREG
BUCK PWM,
CC, CV,
Registers
& I2C
INTERFACE
CONTROL
BLOCK
+
-
VL
BATSNSN
NOBAT
VBUS
+
AICL
-
+
OVP
-
+
UVLO
-
+
-
+
-
Weak
Battery
VTH
Tj
100C
THERMAL REGULATION
V
Trickle
+
-
+
V
TH_TRK
Tj
150C
THERMAL SHUTDOWN
Vprechg
-
Vpre-chg
I2C
disable
SHDNB
Figure 2. BC3770 Simplified Internal Block Diagram
BC3770
3
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
Pin Connections
1
A
VBUS
TRANSPARENT
TOP VIEW
2
VBUS
3
VL
4
SCL
5
SDA
B
PMID
BOOT
BAT
SNSN
VIO
INTB
C
LX
NO
BAT
GND
BAT
REG
CHG
OUT
D
LX
CHG
ENB
SH
DNB
VSYS
CHG
OUT
E
PGND
PGND
VSYS
VSYS
CHG
OUT
Figure 3. BC3770 Pin Connections (Transparent Top View)
Functional descriptions of many of these pins can be found in the Functional Pin Description section beginning on
page 13.
Table 2. BC3770 Pin Definitions
Pin
Pin Name
Pin
Function
Formal Name
Definition
Connect the pins to the output of USB or DCP (dedicated Charging Port)
adapter. Bypass with a 2.2
F/10
V ceramic capacitor to the ground, in case the
peak voltage on the pins is always below 10 V due to a clamp device. Otherwise,
a 2.2
F/25
V or higher rating capacitor is recommended. The two VBUS pins
must be connected together externally. These pins are used as an output in OTG
mode. An embedded 100 kdischarge resistance is enabled in Charge mode.
It is disconnected in the Boost mode.
The analog output for internal reference, bandgap and so on. DO NOT LOAD.
Bypass with a 1.0
F/10
V to ground.
Use a pull-up resistor, 1.5 k to 2.2 k, to the VIO.
A1, A2
VBUS
Input
USB/DCP Adapter Input
A3
VL
Output
Internal Regulator Output
Clock Input for FS I
2
C
Serial Interface with the
Processor
Data I/O for FS I
2
C Serial
Interface with the Processor
VBUS Bypass Output
High-side MOSFET Driver
Supply
Battery - Terminal Sensing
Supply for Internal Buffer
A4
SCL
Input
Input/
Output
Output
A5
SDA
Use a pull-up resistor, 1.5 k to 2.2 k, to the VIO.
High-side MOSFET connection node and VBUS bypass output. Bypass with a
2.2
F
ceramic capacitor to PGND pins as close as possible. Do NOT LOAD any
external applications.
Bypass BOOT to LX with a 22 nF/10 V ceramic capacitor.
Connect to negative terminal of battery cell as close as possible. If a sense
resistor is used for a fuel gauge, connect the pin to the ground terminal of the
sense resistor.
Connect to the system I/O supply voltage rail.
B1
PMID
B2
BOOT
B3
B4
BATSNSN
VIO
BC3770
Analog Integrated Circuit Device Data
Freescale Semiconductor
4
Table 2. BC3770 Pin Definitions (continued)
Pin
B5
C1, D1
Pin Name
INTB
LX
Pin
Function
Output
Formal Name
Logic Output for Interrupt
Switching Node
Definition
An open-drain output with an external pull-up resistor, 200 k, to the system I/O
supply. Active-low when status change on interrupt registers occurs.
Connect a 1.0
H
inductor. The two LX pins must be connected together
externally.
Connect the pin to VF or ID pin on the battery cell. It has an internal pull-up
resistance, 300 k typ, to the VL. If a logic-high threshold is detected on the pin,
the charging is suspended immediately. If this pin is not used, connect it to
ground.
Must be connected to the system ground.
Connect to positive terminal of battery cell as close as possible.
These pins must be connected together externally. Bypass with a 4.7
F/10
V or
higher to ground.
Logic-low to enable charger. Logic-high to disable the charger, not to disable
buck converter. It has an internal 300 k resistance to ground. If this pin is not
used, leave it open or connect it to ground. The serial interface, I
2
C, is still
available in CHGENB = High.
If there is no valid input source, logic-low is to put the I
2
C interface into Disabled
mode to reduce the idle current as low as possible. In the Shutdown mode, I
2
C
interface is not available but the Q4 FET is kept ON. A valid power source on
VBUS is able to overwrite to wake-up the device for Charge mode even in
SHDNB = Low. This pin is not effective as long as a valid input power source is
present.
This pin has an internal pull-down resistance, 300 k typ. If this pin is not used,
tie it to the system I/O supply rail or an appropriate rail to reduce idle current as
low as possible.
VSYS is the power supply for the system load. When a valid power source at
VBUS is attached, VSYS is regulated at 3.6 V until the BATREG hits the
threshold of V
SYS_MIN
x R
DS(on)_Q4
. When the +Terminal on the battery cell is
regulated at VBATREG, the VSYS output is regulated to the I
FAST_CHG
x
R
DS(on)_Q4
above BATREG. Bypass with a 10
F/10
V ceramic capacitor to
ground.
The two PGND pins must be connected together externally.
C2
NOBAT
Input
Logic Input for Battery
Presence Detection
Device Ground
Battery + Terminal Sensing
C3
C4
C5, D5, E5
GND
BATREG
CHGOUT
Ground
Output
Battery Charger Output
D2
CHGENB
Input
Charger Enable Logic Input
D3
SHDNB
Input
Logic Input for Disabling I
2
C
Interface
D4, E3, E4
VSYS
Output
System Supply Output
E1, E2
PGND
Ground
Power Ground for the Buck
Converter
BC3770
5
Analog Integrated Circuit Device Data
Freescale Semiconductor