NVMFS5C404NL
Power MOSFET
Features
40 V, 0.67 mW, 370 A, Single N−Channel
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
NVMFS5C404NLWF
−
Wettable Flank Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R
qJC
(Notes 1, 3)
Power Dissipation
R
qJC
(Note 1)
Continuous Drain
Current R
qJA
(Notes 1, 2, 3)
Power Dissipation
R
qJA
(Notes 1 & 2)
Pulsed Drain Current
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
T
L
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
40
±20
370
260
200
100
52
37
3.9
1.9
900
−55
to
+ 175
191
907
260
A
°C
A
mJ
°C
W
1
www.onsemi.com
V
(BR)DSS
40 V
R
DS(ON)
MAX
0.67 mW @ 10 V
1.0 mW @ 4.5 V
I
D
MAX
370 A
Unit
V
V
A
G (4)
D (5,6)
W
A
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
D
S
S
S
G
D
XXXXXX
AYWZZ
D
D
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (I
L(pk)
= 38 A)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
XXXXXX = 5C404L
XXXXXX =
(NVMFS5C404NL) or
XXXXXX =
404LWF
XXXXXX =
(NVMFS5C404NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case
−
Steady State
Junction−to−Ambient
−
Steady State (Note 2)
Symbol
R
qJC
R
qJA
Value
0.75
39
Unit
°C/W
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2016
February, 2017
−
Rev. 7
1
Publication Order Number:
NVMFS5C404NL/D
NVMFS5C404NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/
T
J
I
DSS
I
GSS
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
V
GP
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dIS/dt = 100 A/ms,
I
S
= 50 A
T
J
= 25°C
T
J
= 125°C
V
GS
= 4.5 V, V
DS
= 20 V,
I
D
= 50 A, R
G
= 1.0
W
V
GS
= 4.5 V, V
DS
= 20 V; I
D
= 50 A
V
GS
= 4.5 V, V
DS
= 20 V; I
D
= 50 A
V
GS
= 10 V, V
DS
= 20 V; I
D
= 50 A
V
GS
= 0 V, f = 1 MHz, V
DS
= 25 V
V
GS
= 10 V
V
GS
= 4.5 V
Forward Transconductance
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
SWITCHING CHARACTERISTICS
(Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
GS
= 0 V,
I
S
= 50 A
0.7
0.61
97.4
46.5
50.9
190
nC
ns
1.2
V
24
135
87
157
ns
12168
4538
79.8
81
181
8.5
27.8
23.8
2.7
V
nC
pF
I
D
= 50 A
I
D
= 50 A
V
GS
= 0 V,
V
DS
= 40 V
T
J
= 25
°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
40
21.6
10
250
100
V
mV/°C
mA
nA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
DS
= 0 V, V
GS
= 20 V
V
GS
= V
DS
, I
D
= 250
mA
1.2
−6.2
0.52
0.75
270
2.0
V
mV/°C
0.67
1.0
mW
S
V
DS
=15 V, I
D
= 50 A
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width
v
300
ms,
duty cycle
v
2%.
5. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
2
NVMFS5C404NL
TYPICAL CHARACTERISTICS
800
3.0 V
I
D
, DRAIN CURRENT (A)
700
600
500
400
300
200
100
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0
0.5
1.0
1.5
T
J
= 125°C
2.0
2.5
T
J
=
−55°C
3.0
3.5
4.0
T
J
= 25°C
280
I
D
, DRAIN CURRENT (A)
240
200
160
120
80
40
0
10 V to 3.2 V
2.8 V
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.0015
0.0013
0.0011
T
J
= 25°C
I
D
= 50 A
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.0010
Figure 2. Transfer Characteristics
0.0014
0.0012
0.0010
0.0009
0.0007
V
GS
= 4.5 V
0.0008
0.0006
V
GS
= 10 V
0.0008
0.0006
0.0005
0.0004
0.0004
T
J
= 25°C
10
50
90
130
170
210
250
290
3
4
5
6
7
8
9
10
0.0002
V
GS
, GATE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
R
DS(on)
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
−50 −25
0
25
50
75
100
125
150
175
10
V
GS
= 10 V
I
D
= 50 A
1M
100k
I
DSS
, LEAKAGE (nA)
10k
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 150°C
T
J
= 125°C
T
J
= 85°C
1k
100
5
10
15
20
25
30
35
40
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
www.onsemi.com
3
NVMFS5C404NL
TYPICAL CHARACTERISTICS
C
ISS
Q
T
C, CAPACITANCE (pF)
8
6
25
20
15
C
OSS
V
GS
= 0 V
T
J
= 25°C
f = 1 MHz
4
2
0
Q
GS
Q
GD
V
DS
= 20 V
T
J
= 25°C
I
D
= 50 A
10
5
0
160 180
C
RSS
0
5
10
15
20
25
30
35
40
0
20
40
60
80
100
120
140
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q
G
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
10,000
I
S
, SOURCE CURRENT (A)
V
GS
= 4.5 V
V
DD
= 20 V
I
D
= 50 A
t, TIME (ns)
1000
46
41
36
31
26
21
16
11
6
10
1
10
R
G
, GATE RESISTANCE (W)
100
1
0.3
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
t
d(off)
t
f
t
r
T
J
= 125°C
100
t
d(on)
T
J
= 150°C
T
J
= 25°C
0.4
0.5
0.6
0.7
0.8
T
J
=
−55°C
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
T
C
= 25°C
V
GS
≤
10 V
1000
0.01 ms
0.1 ms
1 ms
dc
10
R
DS(on)
Limit
Thermal Limit
Package Limit
1
0.1
1
V
DS
(V)
10
100
1
10 ms
I
PEAK
(A)
100
Figure 10. Diode Forward Voltage vs. Current
100
I
DS
(A)
T
J(initial)
= 25°C
T
J(initial)
= 100°C
10
1E−04
1E−03
TIME IN AVALANCHE (s)
1E−02
Figure 11. Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
www.onsemi.com
4
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
14k
13k
12k
11k
10k
9k
8k
7k
6k
5k
4k
3k
2k
1k
0
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
10
30
NVMFS5C404NL
100
50% Duty Cycle
10
R
qJA
(t) (°C/W)
20%
10%
5%
2%
1%
NVMFS5C404NL 650 mm
2
, 2 oz., Cu Single Layer Pad
1
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
PULSE TIME (sec)
0.1
1
10
100
1000
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
NVMFS5C404NLT1G
NVMFS5C404NLWFT1G
NVMFS5C404NLT3G
NVMFS5C404NLWFT3G
NVMFS5C404NLAFT1G
NVMFS5C404NLWFAFT1G
Marking
5C404L
404LWF
5C404L
404LWF
5C404L
404LWF
Package
DFN5
(Pb−Free)
DFN5
(Pb−Free, Wettable Flanks)
DFN5
(Pb−Free)
DFN5
(Pb−Free, Wettable Flanks)
DFN5
(Pb−Free)
DFN5
(Pb−Free, Wettable Flanks)
Shipping
†
1500 / Tape & Reel
1500 / Tape & Reel
5000 / Tape & Reel
5000 / Tape & Reel
1500 / Tape & Reel
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
5
单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
