NVMFD5875NL
Power MOSFET
60 V, 33 mW, 22 A, Dual N−Channel, Logic
Level, Dual SO8FL
Features
•
Low R
DS(on)
to Minimize Conduction Losses
•
Low Capacitance to Minimize Driver Losses
•
NVMFD5875NLWF − Wettable Flanks Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
These Devices are Pb−Free, Halogen Free and are RoHS Compliant
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
qJC
(Notes 1, 2,
3, 4)
Power Dissipation
R
qJC
(Notes 1, 2, 3)
Continuous Drain Cur-
rent R
qJA
(Notes 1 &
3, 4)
Power Dissipation
R
qJA
(Notes 1, 3)
Pulsed Drain Current
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
60
"20
22
15
32
16
7
5.8
A
W
Unit
V
V
A
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V
(BR)DSS
60 V
45 mW @ 4.5 V
Dual N−Channel
D1
D2
R
DS(on)
MAX
33 mW @ 10 V
22 A
I
D
MAX
G1
S1
G2
S2
MARKING DIAGRAM
D1 D1
1
3.2
2.2
80
−55 to
+175
19
10.5
40
W
A
°C
A
mJ
DFN8 5x6
(SO8FL)
CASE 506BT
S1
G1
S2
G2
5875xx
AYWZZ
D2 D2
D1
D1
D2
D2
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−
to−Source Avalanche
Energy (T
J
= 25°C,
V
DD
= 24 V, V
GS
=
10 V, R
G
= 25
W)
(I
L(pk)
= 14.5 A, L =
0.1 mH)
(I
L(pk)
= 6.3 A, L =
2 mH)
5875NL = Specific Device Code
for NVMFD5875NL
5875LW = Specific Device Code
for NVMFD5875NLWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
ORDERING INFORMATION
Device
NVMFD5875NLT1G
NVMFD5875NLWFT1G
NVMFD5875NLT3G
NVMFD5875NLWFT3G
Package
Shipping
†
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
(Note 1)
Parameter
Junction−to−Case − Steady State (Note 2, 3)
Junction−to−Ambient − Steady State (Note 3)
Symbol
R
qJC
R
qJA
Value
4.65
47
Unit
°C/W
DFN8
1500 / Tape &
(Pb−Free)
Reel
DFN8
1500 / Tape &
(Pb−Free)
Reel
DFN8
5000 / Tape &
(Pb−Free)
Reel
DFN8
5000 / Tape &
(Pb−Free)
Reel
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
June, 2017 − Rev. 0
Publication Order Number:
NVMFD5875NL/D
NVMFD5875NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On Resistance
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 10 V, V
DS
= 48V, I
D
= 5.0A
V
GS
= 4.5 V, V
DS
= 48 V,
I
D
= 5.0 A
V
GS
= 0 V, f = 1.0 MHz, V
DS
= 25 V
540
55
36
5.9
0.62
1.64
2.80
11
20
nC
nC
pF
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
V
GS
= 10 V
V
GS
= 4.5 V
I
D
= 7.5 A
I
D
= 7.5 A
V
GS
= V
DS
, I
D
= 250
mA
1.0
3.5
27
37
7.0
33
45
S
3.0
V
mV/°C
mW
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
I
GSS
V
GS
= 0 V,
V
DS
= 60 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
60
53
1.0
10
±100
nA
V
mV/°C
mA
Symbol
Test Condition
Min
Typ
Max
Unit
V
DS
= 0 V, V
GS
=
±20
V
V
DS
= 15 V, I
D
= 5.0 A
SWITCHING CHARACTERISTICS
(Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
T
J
= 25°C
T
J
= 125°C
V
GS
= 10 V, V
DS
= 48 V,
I
D
= 5.0 A, R
G
= 2.5
W
V
GS
= 4.5 V, V
DS
= 48 V,
I
D
= 5.0 A, R
G
= 2.5
W
8.1
15.8
11.8
3.9
4.9
6.4
14.5
2.4
ns
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance
Gate Inductance
Gate Resistance
L
S
L
D
L
G
R
G
T
A
= 25°C
0.93
0.005
1.84
1.5
W
nH
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, d
IS
/d
t
= 100 A/ms,
I
S
= 5.0 A
V
GS
= 0 V,
I
S
= 5.0 A
0.8
0.7
14.5
11.5
3.1
11
nC
ns
1.2
V
5. Pulse Test: pulse width = 300
ms,
duty cycle
v
2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NVMFD5875NL
TYPICAL CHARACTERISTICS
40
36
I
D
, DRAIN CURRENT (A)
32
28
24
20
16
12
8
4
0
0
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
3.5 V
3.0 V
0
1
2
3
4.0 V
V
GS
= 10 V
5V
T
J
= 25°C
I
D
, DRAIN CURRENT (A)
4.5 V
30
V
DS
≥
10 V
20
10
T
J
= 25°C
T
J
= 125°C
T
J
= −55°C
4
5
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.065
0.060
0.055
0.050
0.045
0.040
0.035
0.030
0.025
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
= 10 A
T
J
= 25°C
0.065
0.060
0.055
0.050
0.045
0.040
0.035
0.030
0.025
5
8
11
14
17
20
23
I
D
, DRAIN CURRENT (A)
V
GS
= 10 V
V
GS
= 4.5 V
T
J
= 25°C
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
175
I
DSS
, LEAKAGE (A)
I
D
= 7.5 A
V
GS
= 10 V
1E−04
1E−05
1E−06
1E−07
1E−08
1E−09
1E−10
1E−11
1E−12
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
T
J
= 125°C
T
J
= 25°C
5
10
15
20
25
30
35
40
45
50
55
60
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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NVMFD5875NL
TYPICAL CHARACTERISTICS
800
700
C, CAPACITANCE (pF)
600
500
400
300
200
C
oss
100
0
0
C
rss
5
10
15
20
25
30
C
iss
V
GS
= 0 V
T
J
= 25°C
10
9
8
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
Q
gs
Q
gd
T
J
= 25°C
V
DD
= 48 V
I
D
= 5 A
8
9
10
11
Q
T
DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Gate Charge
1000
I
S
, SOURCE CURRENT (A)
V
DD
= 48 V
I
D
= 5 A
V
GS
= 10 V
100
t, TIME (ns)
t
d(off)
t
f
t
r
10
t
d(on)
40
V
GS
= 0 V
T
J
= 25°C
30
20
10
1
1
10
R
G
, GATE RESISTANCE (W)
100
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
Figure 10. Diode Forward Voltage
10
ms
I
D
, DRAIN CURRENT (A)
100
ms
10
1 ms
1
V
GS
= 20 V
Single Pulse
T
C
= 25°C
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
0.1
1
10
10 ms
dc
100
V
DS
, DRAIN VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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NVMFD5875NL
TYPICAL CHARACTERISTICS
100
Duty Cycle = 0.5
10
R
qJA(t)
(°C/W)
0.2
0.1
0.05
0.02
0.01
0.1
Single Pulse
Device Mounted on 650 mm
2
2 oz Cu PCB
1
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 12. Thermal Response
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