Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching characteristics are independent of operating junction temperatures.
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2
NTNS4C69N
TYPICAL CHARACTERISTICS
5
V
GS
= 4.5 V to 2.9 V
I
D
, DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
4
2.5 V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
0.5
1.0
1.5
T
J
= 125°C
T
J
= −55°C
2.0
2.5
3.0
T
J
= 25°C
V
DS
= 5 V
3
2.2 V
2
2.0 V
1
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1.8 V
1.6 V
1.4 V
4.0 4.5 5.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
450
400
350
300
250
200
150
100
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
T
J
= 25°C
I
D
= 0.3 A
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
400
380
360
340
320
300
280
260
240
220
200
180
160
140
120
100
0
0.1
Figure 2. Transfer Characteristics
V
GS
= 1.8 V
T
J
= 25°C
V
GS
= 3.7 V
V
GS
= 2.5 V
V
GS
= 3.3 V
V
GS
= 4.5 V
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9 1.0
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (Normalized)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50
−25
0
25
50
75
100
125
150
0.1
V
GS
= 10 V
I
D
= 0.3 A
I
DSS
, LEAKAGE (nA)
10,000
1000
100
10
1
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 25°C
T
J
= 85°C
T
J
= 125°C
T
J
= 150°C
0.01
5
10
15
20
25
30
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NTNS4C69N
TYPICAL CHARACTERISTICS
1000
V
GS
= 0 V
T
J
= 25°C
f = 1 MHz
100
C
iss
C
oss
10
C
rss
10
9
8
7
6
5
4
3
2
1
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Q
G
, TOTAL GATE CHARGE (nC)
Q
GS
Q
GD
V
DS
= 15 V
I
D
= 0.2 A
T
J
= 25°C
1
0
5
10
15
20
25
30
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
Figure 8. Gate−to−Source vs. Total Charge
100
I
S
, SOURCE CURRENT (A)
V
GS
= 4.5 V
V
DS
= 15 V
I
D
= 0.2 A
1
V
GS
= 0 V
0.1
T
J
= 125°C
0.01
T
J
= 25°C
T
J
= −55°C
t, TIME (ns)
10
t
d(off)
t
f
t
d(on)
t
r
1
1
10
R
G
, GATE RESISTANCE (W)
100
0.001
0.3
0.4
0.5
0.6
0.7
0.8
0.9
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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4
NTNS4C69N
PACKAGE DIMENSIONS
SOT−883 (XDFN3), 1.0x0.6, 0.35P
CASE 506CB
ISSUE A
D
A B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
DIM
A
A1
b
D
D2
e
E
E2
L
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.340 0.440
0.000 0.030
0.075 0.200
0.950 1.075
0.620 BSC
0.350 BSC
0.550 0.675
0.425 0.550
0.170 0.300
0.10 C
0.10 C
0.10 C
3X
0.10 C
A1
SIDE VIEW
D2
2X
e/2
e
0.10
0.05
M
M
1
2X
3X
b
C A B
C
ON Semiconductor and the
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SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
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ÉÉÉ
ÉÉÉ
PIN ONE
REFERENCE
E
TOP VIEW
NOTE 3
A
C
RECOMMENDED
SOLDER FOOTPRINT*
1.10
0.43
1
0.41
0.55
2X
E2
L
0.20
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
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