FAN6757— mWSaver® PWM Controller
November 2013
FAN6757— mWSaver® PWM Controller
Features
Single-Ended Topologies, such as Flyback and
Forward Converters
mWSaver® Technology
Description
The FAN6757 is a next-generation Green Mode PWM
controller with innovative mWSaver® technology, which
dramatically reduces standby and no-load power
consumption, enabling conformance to worldwide
Standby Mode efficiency guidelines.
An innovative AX-CAP method minimizes losses in the
EMI filter stage by eliminating X-cap discharge resistors
while meeting IEC61010-1 safety requirements.
Protections ensure safe operation of the power system
in various abnormal conditions. A proprietary frequency-
hopping function decreases EMI emission. Built-in
synchronized slope compensation allows more stable
Peak-Current-Mode control over a wide range of input
voltage and load conditions. The proprietary internal line
compensation ensures constant output power limit over
the entire universal line voltage range.
Requiring a minimum number of external components,
FAN6757 provides a basic platform that is well suited for
cost-effective flyback converter designs that require
extremely low standby power consumption.
®
-
Achieves Low No-Load Power Consumption:
<50 mW at 230 V
AC
(EMI Filter Loss Included)
-
Eliminates X
®
Capacitor Discharge Resistor Loss
with AX-CAP Technology
to 23 kHz
-
Linearly Decreases Switching Frequency
-
Burst Mode Operation at Light-Load Condition
-
500 V High-Voltage JFET Startup Circuit to
Eliminate Startup Resistor Loss
Highly Integrated with Rich Features
-
Proprietary Frequency Hopping to Reduce EMI
-
High-Voltage Sampling to Detect Input Voltage
-
Peak-Current-Mode Control with Slope
Compensation
-
Cycle-by-Cycle Current Limiting with Line
Compensation
Applications
Flyback power supplies that demand extremely low
standby power consumption, such as:
-
Leading-Edge Blanking (LEB)
-
Built-In 7 ms Soft-Start
Advanced Protections
-
Brown-In/Brownout Recovery
-
Internal Overload / Open-Loop Protection (OLP)
-
V
DD
Under-Voltage Lockout (UVLO)
-
V
DD
Over-Voltage Protection (V
DD
OVP)
-
Over-Temperature Protection (OTP)
-
Current-Sense Short-Circuit Protection (SSCP)
Ordering Information
Part Number
FAN6757MRMX
Adapters for Notebooks, Printers, Game Consoles
Open-Frame SMPS for LCD TV, LCD Monitors,
Printers
Protections
OLP
A/R
(1)
OVP
L
OTP
L
SSCP
A/R
Operating
Temperature Range
-40 to +105°C
Package
8-Pin, Small-Outline
Package (SOP)
Packing
Method
Tape &
Reel
Note:
1. A/R = Auto Recovery Mode protection, L = Latch Mode protection.
© 2013 Fairchild Semiconductor Corporation
FAN6757 • Rev. 1.0.1
www.fairchildsemi.com
FAN6757— mWSaver® PWM Controller
Application Diagram
VAC
+
V
O
-
FAN6757
1 GND
2 FB
3 NC
4 HV
GATE 8
VDD 7
SENSE 6
RT 5
Figure 1. Typical Application
Internal Block Diagram
HV
4
Line
Sensing
VDDOVP
OTP
Latch
Protection
Re-Start
Protection
SSCP
OLP
Soft
Driver
V
Limit
S
R
V
RESET
SSCP
Q
SSCP
Comparator
V
PWM
NC
3
Brownout Function
High/Low Line
Compensation
8
GATE
VDD
7
UVLO
Internal
BIAS
OSC
t
D-SSCP
V
SSCP-H/L
…
V
DD-ON
/
V
RESTART
Soft-Start
Comparator
Soft-Start
Current Limit
Comparator
Pattern
Generator
V
RESET
VDD
OVP
t
D-VDDOVP
Green
Mode
V
Limit
PWM
Comparator
Blanking
Circuit
6
SENSE
V
DD-OVP
Max.
Duty
I
RT
V
PWM
Slope
Compensation
V
FB-OPEN
Z
FB
RT
5
V
RTTH1
t
D-OTP1
OTP
3R
OLP
t
D-OLP
OLP
Comparator
R
2
FB
t
D-OTP2
V
RTTH2
V
FB-OLP
1
GND
Figure 2. Functional Block Diagram
© 2013 Fairchild Semiconductor Corporation
FAN6757 • Rev. 1.0.1
www.fairchildsemi.com
2
FAN6757— mWSaver® PWM Controller
Marking Information
Z - Plant Code
X - 1-Digit Year Code
Y - 1-Digit Week Code
TT - 2-Digit Die Run Code
T - Package Type (M=SOP)
M - Manufacture Flow Code
Figure 3. Top Mark
ZXYTT
6757
TM
Pin Configuration
SOP-8
GND
FB
NC
HV
1
2
3
4
8
7
6
5
GATE
VDD
SENSE
RT
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
1
Name
GND
Description
Ground.
This pin is used for the ground potential of all the pins. A 0.1 µF decoupling capacitor
placed between VDD and GND is recommended.
Feedback.
The output voltage feedback information from the external compensation circuit is fed
into this pin. The PWM duty cycle is determined from this pin and the current-sense signal from
Pin 6. The FAN6757 performs open-loop protection: if the FB voltage is higher than a threshold
voltage (around 4.6 V) for more than 57.5 ms, the controller latches off the PWM.
No connection
High-Voltage Startup.
This pin is connected to the line input or bulk capacitor, via 200 kΩ
resistors, to achieve brownout and high/low line compensation. If the voltage of the HV pin is
lower than the brownout voltage (AC line peak voltage less than 100 V) and lasts for 65 ms,
PWM output turns off. High/low line compensation dominates the OCP level and cycle-by-cycle
current limit, to solve the unequal OCP level and power-limit problems under universal input.
Over-Temperature Protection.
An external NTC thermistor is connected from this pin to the
GND pin. The impedance of the NTC thermistor decreases at high temperatures. Once the
voltage of the RT pin drops below the threshold voltage, the controller latches off the PWM. If the
RT pin is not connected to an NTC resistor for over-temperature protection, it is recommended to
place one 100 kΩ resistor to ground to prevent from noise interference. This pin is limited by an
internal clamping circuit.
Current Sense.
The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting.
Power Supply.
The internal protection circuit disables PWM output as long as V
DD
exceeds the
OVP trigger point.
Gate Drive Output.
The totem-pole output driver for the power MOSFET. It is internally clamped
below 14.5 V.
2
3
FB
NC
4
HV
5
RT
6
7
8
SENSE
VDD
GATE
© 2013 Fairchild Semiconductor Corporation
FAN6757 • Rev. 1.0.1
www.fairchildsemi.com
3
FAN6757— mWSaver® PWM Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
VDD
V
FB
V
SENSE
V
RT
V
HV
P
D
ϴ
JA
T
J
T
STG
T
L
ESD
DC Supply Voltage
(1,2)
Parameter
FB Pin Input Voltage
SENSE Pin Input Voltage
RT Pin Input Voltage
HV Pin Input Voltage
Power Dissipation (T
A
＜50°C)
Thermal Resistance (Junction-to-Air)
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Wave Soldering or IR, 10 Seconds)
Human Body Model, JEDEC:JESD22-A114
All Pins except HV Pin
(3)
(3)
Min.
-0.3
-0.3
-0.3
Max.
30
7.0
7.0
7.0
500
400
150
Units
V
V
V
V
V
mW
C/W
C
C
C
kV
-40
-55
+125
+150
+260
6.5
2.0
Charged Device Model, JEDEC:JESD22-C101 All Pins except HV Pin
Notes:
1. All voltage values, except differential voltages, are given with respect to the network ground terminal.
2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
3. ESD level on the HV pin is CDM=1 kV and HBM=1 kV.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. We does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
R
HV
Parameter
Resistance on HV Pin
Min.
150
Typ.
200
Max.
250
Unit
kΩ
© 2013 Fairchild Semiconductor Corporation
FAN6757 • Rev. 1.0.1
www.fairchildsemi.com
4
FAN6757— mWSaver® PWM Controller
Electrical Characteristics
V
DD
=15 V and T
J
=T
A
=25C unless otherwise noted.
Symbol
V
DD
Section
V
DD-ON
V
UVLO
V
RESTART
V
DD-OFF
V
DD-OLP
V
DD-LH
V
DD-AC
I
DD-ST
I
DD-OP1
I
DD-OP2
I
DD-OLP
I
LH
V
DD-OVP
t
D-VDDOVP
Parameter
Threshold Voltage to Startup
Threshold Voltage to Stop Switching in
Normal Mode
Conditions
V
DD
Rising
V
DD
Falling
Min.
16
5.5
Typ.
17
6.5
4.7
Max.
18
7.5
Unit
V
V
V
Threshold Voltage to enable HV Startup
V
DD
Falling
to Charge V
DD
in Normal Mode
Threshold Voltage to Stop Operating in
Protection Mode
V
DD
Falling
10
6
3.5
V
UVLO
+2.5
V
DD
=V
DD-ON
– 0.16 V
V
DD
=15 V, V
FB
=3 V,
Gate Open
V
DD
=15 V, V
FB
<1.4 V,
Gate Off
V
DD
= V
DD-OLP
+ 0.1 V
V
DD
= 5 V
90
30
23.5
110
11
7
4.0
V
UVLO
+3.0
12
8
4.5
V
UVLO
+3.5
30
1.8
800
V
V
V
V
µA
mA
µA
µA
µA
Threshold Voltage to Enable HV Startup
V
DD
Falling
to Charge V
DD
in Protection Mode
Threshold Voltage to Release Latch
Mode
Minimum Voltage of VDD Pin for
Enabling Brown-in to Avoid Startup Fail
Startup Current
Supply Current in PWM Operation
Supply Current when PWM Stops
Internal Sink Current when V
DD-
OLP
<V
DD
<V
DD-OFF
in Protection Mode
Internal Sink Current when V
DD
<V
DD-OLP
in Latch-Protection Mode
Threshold Voltage for V
DD
Over-Voltage
Protection
V
DD
Over-Voltage Protection Debounce
Time
V
DD
Falling
140
190
24.5
205
25.5
300
V
µs
HV Section
I
HV
V
AC-OFF
V
AC-ON
△V
AC
t
D-AC-OFF
t
S-WORK
t
S-REST
V
HV-DIS
t
D-HV-DIS
t
HV-DIS
Inherent Current Limit of HV Pin
Threshold Voltage for Brownout
Threshold Voltage for Brown-In
V
AC-ON
– V
AC-OFF
Debounce Time for Brownout
Work Period of HV-Sampling Circuit in
Standby Mode
Rest Period of HV-Sampling Circuit in
Standby Mode
HV Discharge Threshold
Debounce Time for HV Discharge
HV Discharge Time
V
FB
<V
FB-ZDC
V
FB
<V
FB-ZDC
R
HV
=200 kΩ to HV Pin
V
AC
=90 V (V
DC
=120 V),
V
DD
=0 V
DC Source Series,
R=200 kΩ to HV Pin
DC Source Series,
R=200 kΩ to HV Pin
DC Source Series,
R=200 kΩ to HV Pin
1.50
90
100
8
40
95
180
V
DC
×0.45
75
360
3.25
100
110
12
65
140
260
V
DC
×0.51
115
510
5.00
110
120
16
90
185
320
V
DC
×0.56
155
660
mA
V
V
V
ms
ms
ms
V
ms
ms
Continued on the following page…
© 2013 Fairchild Semiconductor Corporation
FAN6757 • Rev. 1.0.1
www.fairchildsemi.com
5
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