HITFET
®
BTS 933
Smart Lowside Power Switch
Features
•
Logic Level Input
•
Input Protection (ESD)
•
Thermal Shutdown
•
Overload protection
•
Short circuit protection
•
Overvoltage protection
•
Current limitation
•
Maximum current adjustable with external resistor
•
Current sense
•
Status feedback with external input resistor
•
Analog driving possible
Product Summary
Drain source voltage
On-state resistance
Current limit
Nominal load current
Clamping energy
V
DS
R
DS(on)
I
D(lim)
I
D(ISO)
E
AS
60
50
3
7
V
mΩ
A
A
2000 mJ
Application
•
All kinds of resistive, inductive and capacitive loads in switching or
linear applications
•
µC compatible power switch for 12 V and 24 V DC applications
•
Replaces electromechanical relays and discrete circuits
N channel vertical power FET in Smart SIPMOS
®
chip on chip tech-
nology. Fully protected by embedded protected functions.
V bb
General Description
+
LOAD
NC
Drain
dv/dt
limitation
Current
limitation
Overvoltage
protection
M
2
3
1
IN
4
CC
Over-
temperature
protection
ESD
R
CC
Overload
protection
Short circuit
Short circuit
protection
protection
Source
5
HITFET
®
Semiconductor Group
Page 1
02.12.1998
BTS 933
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Drain source voltage
Drain source voltage for short circuit protection
R
CC
= 0
Ω
without
R
CC
Continuous input current
-0.2V
≤
V
IN
≤
10V
1)
Symbol
Value
60
15
50
Unit
V
V
DS
V
DS(SC)
I
IN
no limit
|
I
IN
|
≤
2
mA
V
IN
< -0.2V or
V
IN
> 10V
Operating temperature
Storage temperature
Power dissipation
T
j
T
stg
P
tot
E
AS
- 40 ... +150
- 55 ... +150
90
2000
3000
°C
W
mJ
V
T
C
= 25 °C
Unclamped single pulse inductive energy
I
D(ISO)
= 7 A
Electrostatic discharge
voltage
(Human Body Model)
V
ESD
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
Load dump protection
V
LoadDump2)
=
V
A
+
V
S
V
IN
=low or high;
V
A
=13.5 V
t
d
= 400 ms,
R
I
= 2
Ω,
I
D
=0,5*7A
t
d
= 400 ms,
R
I
= 2
Ω,
I
D
= 7A
DIN humidity category, DIN 40 040
IEC climatic category; DIN IEC 68-1
V
LD
90
74
E
40/150/56
Thermal resistance
junction - case:
junction - ambient:
SMD version, device on PCB:
3)
R
thJC
R
thJA
R
thJA
1.4
75
45
K/W
1
A sensor holding current of 500 µA has to be guaranted in the case of thermal shutdown (see also page 3)
2
V
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Loaddump
3
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm 2 (one layer, 70 µm thick) copper area for Drain connection. PCB is vertical
without blown air.
Semiconductor Group
Page 2
02.12.1998
BTS 933
Electrical Characteristics
Parameter
at T
j
=25°C, unless otherwise specified
Characteristics
Drain source clamp voltage
Symbol
min.
Values
typ.
-
-
1.7
30
150
2500
max.
73
10
2.2
55
350
4000
V
µA
V
µA
Unit
V
DS(AZ)
I
DSS
V
IN(th)
I
IN(1)
60
-
1.3
-
60
1000
T
j
= - 40 ...+ 150°C,
I
D
= 10 mA
Off state drain current
V
DS
= 32 V,
T
j
= -40...+150 °C,
V
IN
= 0 V
Input threshold voltage
I
D
= 1,4 mA
Input current - normal operation,
I
D
<
I
D(lim)
:
V
IN
= 10 V
Input current - current limitation mode,
I
D
=
I
D(lim)
:
I
IN(2)
V
IN
= 10 V
Input current - after thermal shutdown,
I
D
=0 A:
V
IN
= 10 V
Input holding current after thermal shutdown
I
IN(3)
I
IN(H)
T
j
= 25 °C
T
j
= 150 °C
On-state resistance
500
300
-
-
50
90
40
75
-
-
-
mΩ
60
120
50
100
-
A
R
DS(on)
-
-
I
D
= 7 A,
V
IN
= 5 V,
T
j
= 25 °C
I
D
= 7 A,
V
IN
= 5 V,
T
j
= 150 °C
On-state resistance
R
DS(on)
-
-
7
I
D
= 7 A,
V
IN
= 10 V,
T
j
= 25 °C
I
D
= 7 A,
V
IN
= 10 ,
T
j
= 150
Nominal load current (ISO 10483)
I
D(ISO)
V
IN
= 10 V,
V
DS
= 0.5 V,
T
C
= 85 °C
Semiconductor Group
Page 3
02.12.1998
BTS 933
Electrical Characteristics
Parameter
at T
j
=25°C, unless otherwise specified
Characteristics
Initial peak short circuit current limit
Symbol
min.
Values
typ.
max.
Unit
I
D(SCp)
I
D(lim)
-
125
-
A
V
IN
= 10 V,
V
DS
= 12 V
Current limit
1)
V
IN
= 10 V,
V
DS
= 12 V,
t
m
= 350
µs,
T
j
= -40...+150 °C, without
R
CC
V
IN
= 10 V,
V
DS
= 12 V,
t
m
= 350
µs,
T
j
= -40...+150 °C,
R
CC
= 0
Ω
Dynamic Characteristics
Turn-on time
Turn-off time
Slew rate on
Slew rate off
3
60
7
80
12
100
V
IN
to 90%
I
D
:
V
IN
to 10%
I
D
:
t
on
t
off
G9
'6
GW
RQ
G9
'6
GW
RII
-
-
-
-
40
70
1
1
100
170
3
3
µs
µs
V/µs
R
L
= -
Ω,
V
IN
= 0 to 10 V,
V
bb
= 12 V
R
L
= -
Ω,
V
IN
= 10 to 0 V,
V
bb
= 12 V
70 to 50%
V
bb
:
R
L
= -
Ω,
V
IN
= 0 to 10 V,
V
bb
= 12 V
50 to 70%
V
bb
:
R
L
= -
Ω,
V
IN
= 10 to 0 V,
V
bb
= 12 V
Protection Functions
Thermal overload trip temperature
Unclamped single pulse inductive energy
T
jt
E
AS
150
2000
450
165
-
-
-
-
-
°C
mJ
I
D
= 7 A,
T
j
= 25 °C,
V
bb
= 32 V
I
D
= 7 A,
T
j
= 150 °C,
V
bb
= 32 V
Inverse Diode
Inverse diode forward voltage
V
SD
-
1.08
-
V
I
F
= 5*7A,
t
m
= 300
µS,
V
IN
= 0 V
1
Device switched on into existing short circuit (see diagram Determination of I
D(lim) . Dependant on the
application, these values might be exceeded for max. 50 µs in case of short circuit occurs while the
device is on condition
Semiconductor Group
Page 4
02.12.1998
BTS 933
Block Diagramm
Terms
RL
I IN
1
RCC
V IN
V
4
CC
IN
HITFET
CC
S
5
3
D
ID
VDS
Vbb
Inductive and overvoltage output clamp
V
Z
D
S
HITFET
The ground lead impedance of
R
CC
should be as low as possible
Input circuit (ESD protection)
Short circuit behaviour
V IN
I D(SCp)
IN
ID
I D(Lim)
ESD-ZD
I
Source
t0
tm
t1
t2
ESD zener diodes are not designed
for DC current > 2 mA @
V
IN
>10V.
t0:
tm:
t1:
t2:
Turn on into a short circuit
Measurementpoint for
ID(lim)
Activation of the fast temperature sensor and
regulation of the drain current to a level where
the junction temperature remains constant.
Thermal shutdown caused by the second
temperature sensor, achieved by an
integrating measurement.
Semiconductor Group
Page 5
02.12.1998
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
