Si4800
N-channel enhancement mode field-effect transistor
M3D315
Rev. 01 — 13 July 2001
Product data
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™
1
technology.
Product availability:
Si4800 in SOT96-1 (SO8).
2. Features
s
Low on-state resistance
s
Fast switching
s
TrenchMOS™ technology.
3. Applications
s
s
s
s
s
DC to DC convertors
DC motor control
Lithium-ion battery applications
Notebook PC
Portable equipment applications.
c
c
4. Pinning information
Table 1:
Pin
1,2,3
4
5,6,7,8
Pinning - SOT96-1, simplified outline and symbol
Description
source (s)
8
5
d
Simplified outline
Symbol
gate (g)
drain (d)
1
Top view
4
MBK187
g
s
MBB076
SOT96-1 (SO8)
1.
TrenchMOS is a trademark of Royal Philips Electronics.
Philips Semiconductors
Si4800
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
j
= 25 to 150
°C
T
amb
= 25
°C;
pulsed; t
p
≤
10 s
T
amb
= 25
°C;
pulsed; t
p
≤
10 s
V
GS
= 10 V; I
D
= 9 A; T
j
= 25
°C
V
GS
= 4.5 V; I
D
= 7 A; T
j
= 25
°C
Typ
−
−
−
−
15.5
27.5
Max
30
9
2.5
150
18.5
33
Unit
V
A
W
°C
mΩ
mΩ
drain-source voltage (DC)
drain current
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
drain-source voltage (DC)
gate-source voltage (DC)
drain current
peak drain current
total power dissipation
storage temperature
operating junction temperature
source (diode forward) current
T
amb
= 25
°C;
pulsed; t
p
≤
10 s
T
amb
= 25
°C;
pulsed; t
p
≤
10 s;
Figure 2
and
3
T
amb
= 70
°C;
pulsed; t
p
≤
10 s;
Figure 2
T
amb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
amb
= 25
°C;
pulsed; t
p
≤
10 s;
Figure 1
T
amb
= 70
°C;
pulsed; t
p
≤
10 s;
Figure 1
Conditions
T
j
= 25 to 150
°C
Min
−
−
−
−
−
−
−
−55
−55
−
Max
30
±20
9
7
40
2.5
1.6
+150
+150
2.3
Unit
V
V
A
A
A
W
W
°C
°C
A
Source-drain diode
9397 750 08412
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 13 July 2001
2 of 13
Philips Semiconductors
Si4800
N-channel enhancement mode field-effect transistor
03aa11
03aa19
120
Pder
(%)
100
120
Ider
(%)
100
80
80
60
60
40
40
20
20
0
0
25
50
75
100
125
150
175
o
Tamb ( C)
0
0
25
50
75
100
125
150
175
o
Tamb ( C)
P
tot
P
der
=
----------------------
×
100%
P
°
tot
(
25 C
)
I
D
I
der
=
------------------
×
100%
-
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
102
ID
(A)
10
RDSon = VDS/ ID
tp = 10 µs
1 ms
03af84
10 ms
1
100 ms
P
10-1
δ
=
tp
T
D.C.
10 s
tp
T
t
10-2
10-1
1
10
VDS (V)
102
T
amb
= 25
°C;
I
DM
is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 08412
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 13 July 2001
3 of 13
Philips Semiconductors
Si4800
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:
R
th(j-a)
Thermal characteristics
Conditions
mounted on a printed circuit board; t
p
≤
10 s
;
minimum footprint;
Figure 4
Value Unit
50
K/W
thermal resistance from junction to ambient
Symbol Parameter
7.1 Transient thermal impedance
102
Zth(j-amb)
δ
= 0.5
(K/W)
0.2
10
0.1
0.05
0.02
1
03af83
P
δ
=
10-1
tp
T
single pulse
tp
T
t
10-2
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
T
amb
= 25
°C
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration.
9397 750 08412
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 13 July 2001
4 of 13
Philips Semiconductors
Si4800
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5: Characteristics
T
j
= 25
°
C unless otherwise specified
Symbol Parameter
Static characteristics
V
GS(th)
I
DSS
gate-source threshold voltage
drain-source leakage current
I
D
= 250
µA;
V
DS
= V
GS
; T
j
= 25
°C
V
DS
= 24 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 55
°C
I
GSS
I
D(on)
R
DSon
gate-source leakage current
On-state drain current
drain-source on-state resistance
V
GS
=
±20
V; V
DS
= 0 V
V
DS
≥
5; V
GS
= 10 V
V
GS
= 10 V; I
D
= 9 A;
Figure 7
and
8
V
GS
= 4.5 V; I
D
= 7 A;
Figure 7
and
8
Dynamic characteristics
g
fs
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
SD
t
rr
forward transconductance
total gate charge
gate-source charge
gate-drain (Miller) charge
turn-on delay time
rise time
turn-off delay time
fall time
source-drain (diode forward) voltage I
S
= 2.3A; V
GS
= 0 V;
Figure 12
reverse recovery time
I
S
= 2.3 A; dI
S
/dt =
−100
A/µs; V
GS
= 0 V
V
DD
= 15 V; R
D
= 15
Ω;
V
GS
= 10 V; R
G
= 6
Ω
V
DS
= 15 V; I
D
= 9 A
I
D
= 9 A; V
DD
= 15 V; V
GS
= 5 V;
Figure 13
−
−
−
−
−
−
−
−
−
−
19
19
4
7.5
11
8
22
9
0.7
50
−
−
−
−
16
15
30
15
1.2
80
S
nC
nC
nC
ns
ns
ns
ns
V
ns
−
−
−
30
−
−
−
−
−
−
15.5
27.5
1
5
100
−
18.5
33
µA
µA
nA
A
mΩ
mΩ
0.8
−
−
V
Conditions
Min
Typ
Max
Unit
Source-drain (reverse) diode
9397 750 08412
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 13 July 2001
5 of 13
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