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BTF1A16G

产品描述Dual Differential Transceiver BTF1A With Idle Bus Indicator
文件大小143KB,共16页
制造商Agere System(LSI Logic)
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BTF1A16G概述

Dual Differential Transceiver BTF1A With Idle Bus Indicator

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Data Sheet
March 2001
Dual Differential Transceiver BTF1A
With Idle Bus Indicator
Features
Driver Features
s
s
s
s
s
Electrostatic discharge (ESD) performance better
than the 41 Series
Lower power requirement than the 41 Series
s
Produces a logic zero in third state
400 mV difference voltage in third state
Two line drivers per package
Logic to convert TTL input logic levels to differen-
tial, pseudo-emmiter coupled logic (ECL) output
logic levels
No line loading when V
CC
= 0 V
High output driver for 50
loads
200 mA short-circuit current (typical)
2.0 ns maximum propagation delay
<0.2 ns output skew (typical)
Description
The BTF1A device is a dual differential transceiver
circuit that transmits and receives digital data over
balanced transmission lines and is compatible with
Lucent Technologies Microelectronics Group differ-
ential drivers and receivers. It is designed to provide
a strong logic zero when in the third state. The mini-
mum difference voltage in the third state is 400 mV. It
is designed specifically for bus applications where a
well-defined logic state is needed when the bus is
idle. The driver puts out a logic
zero
when in the third
state mode, which is easily overriden by an active
buffer on the bus. When all the buffers on the bus are
inactive (third state), the signal on the bus is a
zero
indicating that the bus is idle.
The dual drivers translate input TTL logic levels to dif-
ferential pseudo-ECL output levels. The dual receiver
converts differential input logic levels to TTL output
levels. Each driver/receiver pair has its own common
enable control allowing serial data and a control clock
to be transmitted and received on a single integrated
circuit. The BTF1A transceiver requires the customer
to supply termination resistors on the circuit board.
The powerdown loading characteristics of the
receiver input circuit are approximately 8 kΩ relative
to the power supplies; hence, it will not load the
transmission line when the circuit is powered down.
For those circuits with termination resistors, the line
will remain impedance matched when the circuit is
powered down. The driver does not load the line
when it is powered down.
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s
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Receiver Features
s
s
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Two line receivers per package
High input impedance
8 kΩ
Logic that converts differential input logic levels to
TTL output logic levels
4.0 ns maximum propagation delay
<0.20 V input sensitivity (typical)
−1.2
V to
+7.2
V common-mode range
s
s
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Common Device Features
s
s
Common enable for each driver/receiver pair
Operating temperature range: –40
°C
to +125
°C
(wider than the 41 Series)
Single 5.0 V
±
5% supply
400 Mbits/s maximum data rate
Meets enhanced small device interface (ESDI)
standards
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s
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