BTA24, BTB24, BTA25
BTA26, BTB26, T25
25 A standard and Snubberless™ triacs
Features
■
■
■
■
■
A2
High current triac
Low thermal resistance with clip bonding
High commutation (4 quadrant) or very high
commutation (3 quadrant) capability
BTA series UL1557 certified (File ref: 81734)
Packages are RoHS (2002/95/EC) compliant
G
A1
A2
A1
A2
G
A1
A2
G
Applications
Applications include the ON/OFF function in
applications such as static relays, heating
regulation, induction motor starting circuits, etc.,
or for phase control operation in light dimmers,
motor speed controllers, and silmilar.
The snubberless versions (BTA/BTB...W and T25
series) are especially recommended for use on
inductive loads, due to their high commutation
performances. The BTA series provides an
insulated tab (rated at 2500 V
RMS
).
TO-220AB Insulated
(BTA24)
A1
G
A2
TO-220AB
(BTB24)
A1
A2
G
RD91
(BTA25)
A2
TOP3 Insulated
(BTA26)
A2
Description
Available either in through-hole or surface-mount
packages, the
BTA24, BTB24, BTA25, BTA26,
BTB26
and
T25
triac series is suitable for general
purpose mains power AC switching.
Table 1.
Symbol
I
T(RMS)
V
DRM
/V
RRM
I
GT
(Snubberless)
I
GT
(Standard)
A1 A2
G
A1
A2
G
D
2
PAK
(T25)
TOP3
(BTB26)
Device summary
Parameter
RMS on-state
current
Repetitive peak
off-state voltage
Triggering gate
current
Triggering gate
current
BTA24
(1)
25
BTB24
25
BTA25
(1)
25
BTA26
(1)
25
BTB26
25
600
-
50
T25
25
600 / 800
35
-
Unit
A
V
mA
mA
600 / 800 600 / 800 600 / 800 600
(2)
/ 800
35 / 50
-
35 / 50
50
50
50
35 / 50
50
1. Insulated packages
2. 600 V version available only with I
GT
= 50 mA (Snubberless and Standard)
TM: Snubberless is a trademark of STMicroelectronics
July 2007
Rev 10
1/12
www.st.com
12
Characteristics
BTA24, BTB24, BTA25, BTA26, BTB26, T25
1
Table 2.
Symbol
Characteristics
Absolute maximum ratings
Parameter
TOP3
D
2
PAK /
TO-220AB
I
T(RMS)
RMS on-state current (full sine wave)
RD91 Ins/
TOP3 Ins.
TO-220AB Ins.
I
TSM
I
²
t
dI/dt
Non repetitive surge peak on-state
current (full cycle, T
j
initial = 25° C)
I
²
t Value for fusing
Critical rate of rise of on-state current
I
G
= 2 x I
GT
, t
r
≤
100 ns
Non repetitive surge peak off-state
voltage
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
F = 50 Hz
F = 60 Hz
t
p
= 10 ms
F = 120 Hz
t
p
= 10 ms
t
p
= 20 µs
T
j
= 125° C
T
j
= 25° C
T
j
= 125° C
T
j
= 125° C
T
c
= 100° C
T
c
= 75° C
t = 20 ms
t = 16.7 ms
250
A
260
340
50
V
DRM
/V
RRM
+ 100
4
1
- 40 to + 150
- 40 to + 125
A
²
s
A/µs
V
A
W
°C
T
c
= 105° C
T
c
= 100° C
25
A
Value
Unit
V
DSM
/V
RSM
I
GM
P
G(AV)
T
stg
T
j
Table 3.
Electrical characteristics (T
j
= 25° C, unless otherwise specified), Snubberless and
logic level (3 quadrants) T25, BTA/BTB24...W, BTA25...W, BTA26...W
T25
BTA/BTB
Unit
T2535
CW
35
1.3
0.2
50
70
MAX.
II
T
j
= 125° C
T
j
= 125° C
MIN.
MIN.
80
500
13
80
500
13
100
1000
22
V/µs
A/ms
50
70
75
80
mA
BW
50
mA
V
V
mA
MAX.
MAX.
MIN.
MAX.
I - III
35
Test Conditions
Quadrant
I - II - III
I - II - III
I - II - III
Symbol
I
GT(1)
V
GT
V
GD
I
H(2)
I
L
dV/dt
(2)
(dI/dt)c
(2)
V
D
= 12 V R
L
= 33
Ω
V
D
= V
DRM
R
L
= 3.3 kΩ
T
j
= 125° C
I
T
= 500 mA
I
G
= 1.2 I
GT
V
D
= 67 %V
DRM
gate open
Without snubber
1. minimum I
GT
is guaranted at 5% of I
GT
max.
2. for both polarities of A2 referenced to A1.
2/12
BTA24, BTB24, BTA25, BTA26, BTB26, T25
Table 4.
Symbol
I
GT (1)
V
GT
V
GD
I
H(2)
)
I
L
dV/dt
(2)
(dV/dt)c
(2)
V
D
= V
DRM
R
L
= 3.3 kΩ T
j
= 125° C
I
T
= 500 mA
I - III - IV
I
G
= 1.2 I
GT
V
D
= 67 %V
DRM
gate open
(dI/dt)c = 13.3 A/ms
MAX.
II
T
j
= 125° C
T
j
= 125° C
MIN.
MIN.
Characteristics
Electrical characteristics (T
j
= 25° C, unless otherwise specified),
standard (4 quadrants), BTB24...B, BTA25...B, BTA26...B, BTB26...B
Test Conditions
Quadrant
I - II - III
V
D
= 12 V
R
L
= 33
Ω
MAX.
IV
ALL
ALL
MAX.
MIN.
MAX.
100
1.3
0.2
80
70
mA
160
500
10
V/µs
V/µs
V
V
mA
Value
50
mA
Unit
1. minimum I
GT
is guaranted at 5% of I
GT
max.
2. for both polarities of A2 referenced to A1.
Table 5.
Symbol
V
TM (1)
V
t0 (1)
R
d (1)
I
DRM
I
RRM
Static characteristics
Test Conditions
I
TM
= 35 A
t
p
= 380 µs
T
j
= 25° C
T
j
= 125° C
T
j
= 125° C
T
j
= 25° C
T
j
= 125° C
MAX.
MAX.
MAX.
MAX.
3
mA
Value
1.55
0.85
16
5
Unit
V
V
mΩ
µA
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
1. for both polarities of A2 referenced to A1.
Table 6.
Symbol
Thermal resistance
Parameter
TOP 3
D
2
PAK / TO-220AB
Value
0.6
0.8
° C/W
RD91 Insulated / TOP3 Insulated
TO-220AB Insulated
(1)
Unit
R
th(j-c)
Junction to case (AC)
0.9
1.7
45
50
60
S = 1 cm
²
D
2
PAK
TOP3 / TOP3 Insulated
TO-220AB / TO-220AB Insulated
R
th(j-a)
Junction to ambient
° C/W
1. S = Copper surface under tab.
3/12
Characteristics
BTA24, BTB24, BTA25, BTA26, BTB26, T25
Figure 1.
Maximum power dissipation versus Figure 2.
RMS on-state current (full cycle)
30
RMS on-state current versus case
temperature (full cycle)
P(W)
30
25
20
15
10
5
I
T(RMS)
(A)
BTB26
25
BTA24
20
15
BTB24 / T25xx /
BTA25 / BTA26
10
5
I
T(RMS)
(A)
0
0
5
10
15
20
25
0
0
25
50
T
C
(°C)
75
100
125
Figure 3.
D
2
PAK RMS on-state current versus Figure 4.
ambient temperature (printed
circuit board FR4, copper
thickness: 35µm) (full cycle)
1E+0
D
2
PAK
(S=1cm
2
)
Relative variation of thermal
impedance versus pulse
duration
I
T(RMS)
(A)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
125
1E-2
1E-1
K=[Z
th
/R
th
]
Z
th(j-c)
Z
th(j-a)
BTA / BTB24 / T25
Z
th(j-a)
BTA26
T
amb
(°C)
t
p
(s)
1E-3
1E-3
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
Figure 5.
On-state characteristics
(maximum values)
Figure 6.
Surge peak on-state current
versus number of cycles
I
TM
(A)
300
T
j
max.
V
to
= 0.85V
R
d
= 16 m
Ω
T
j
= T
j
max.
I
TSM
(A)
300
250
t=20ms
100
200
Non repetitive
T
j
initial=25°C
One cycle
150
10
T
j
= 25°C.
100
50
1
0.5
1.0
1.5
2.0
Repetitive
T
C
=75°C
V
TM
(V)
2.5
3.0
3.5
4.0
4.5
Number of cycles
0
1
10
100
1000
4/12
BTA24, BTB24, BTA25, BTA26, BTB26, T25
Characteristics
Figure 7.
Non-repetitive surge peak on-state Figure 8.
current for a sinusoidal pulse with
width t
p
< 10 ms and corresponding
value of I
2
t
2.5
T
j
initial=25°C
Relative variation of gate trigger
current, holding current and
latching current versus junction
temperature (typical values)
I
TSM
(A), I
2
t (A
2
s)
3000
dI/dt limitation:
50A/µs
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.0
I
GT
I
TSM
1000
1.5
I
H
& I
L
I
2
t
1.0
0.5
t
p
(ms)
100
0.01
0.10
1.00
10.00
0.0
-40
-20
0
20
T
j
(°C)
40
60
80
100
120
140
Figure 9.
Relative variation of critical rate of
decrease of main current versus
(dV/dt)c (typical values)
Figure 10. Relative variation of critical rate of
decrease of main current versus T
j
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.1
1.0
10.0
100.0
T2535/CW/BW
B
(dI/dt)c [T
j
] / (dI/dt)c [T
j
specified]
6
5
4
3
2
1
(dV/dt)c (V/µs)
0
0
25
50
T
j
(°C)
75
100
125
Figure 11. D
2
PAK thermal resistance junction to
ambient versus copper surface under
tab (printed circuit board FR4, copper
thickness: 35 µm)
R
th(j-a)
(°C/W)
80
70
60
50
40
30
20
10
0
0
4
8
12
16
20
24
28
32
36
40
D
2
PAK
S(cm²)
5/12
FPGA/CPLD
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