The LV8163QA is a driver IC for single phase fan motor which operates noiselessly by BTL linear output method.
The LV8163QA has variable speed function that corresponds to external PWM single input. Therefore, this IC is
suitable for CPU cooler for note PC and the like which requires low power consumption, noiseless operation and
variable speed functions.
Functions
•
Single phase full wave drive by BTL output method.
•
Speed control function by PWM input.
•
Integrated lock protector and auto recovery circuit.
•
Standby mode and quick start function.
•
Hall bias output pin.
•
Startup support function (100% DUTYSTART)
•
FG signal pin, RD signal pin
•
Integrated TSD (Thermal ShutDown) circuit
Specifications
Absolute Maximum Ratings
at Ta = 25°C
Parameter
Power supply voltage
Output pin current
Output pin withstand voltage
HB output current
PWM pin voltage
FG/RD pin sink current
FG/RD output pin voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VCC max
IOUT max
VOUT max
IHB max
VPWM max
IFG/IRD max
VFG/VRD max
Pd max
Topr
Tstg
Mounted on specified board *1
Conditions
Ratings
7
0.7
7
10
7
5
7
1050
-30 to +95
-55 to +150
Unit
V
A
V
mA
V
mA
V
mW
°C
°C
*1 Specified substrate : 105mm
×
120mm
×
1.6mm, two-sided glass epoxy board
*2 Do not exceed Tjmax = 150°C
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
May, 2013
N2812NK 20121115-S00004 /53012 SY 20120522-S00007 No.A2065-1/7
LV8163QA
Operating Conditions
at Ta = 25°C
Parameter
Power supply voltage
Operating power supply voltage
Hall input common-mode input voltage
range
PWM pin input frequency
FPWMIN
20 to 60
kHz
Symbol
VCC
VCCop
VICM
Conditions
Ratings
5.0
2.0 to 6.0
0.2 to VCC-1.2
Unit
V
V
V
Electrical Characteristics
at Ta = 25°C, VCC = 5V
Parameter
Circuit current
Symbol
ICC
ICC st
HB pin voltage
Output pin high-level voltage
Output pin low-level voltage
Hall amplifier input offset voltage
Hall amplifier voltage gain
PWM pin input Low level voltage
PWM pin input High level voltage
VHB
VOH
VOL
VINOFS
GH
VPWML
VPWMH
VCC < 4V
4V
FG/RD pin low-level voltage
FG/RD pin leak current
FG comparator hysteresis width
Lock-detection output ON time
Lock-detection output OFF time
Lock-detection output ON/OFF ratio
Thermal shutdown operating temperature
Thermal shutdown hysteresis width
VFGL/VRDL
IFGL/IRDL
FGHYS
LT1
LT2
LRTO
TSD
ΔTSD
LRTO=LT2/LT1
Design guarantee *
Design guarantee *
0.4
4
8
VCC
Conditions
min
During operation
During Standby mode
IHB = 5mA
IOUT = 200mA (VCC – VOUT)
IOUT = 200mA
-6
44
0
1.8
VCC
×
0.45
IFG/IRD = 3mA
VFG/VRD = 7V
±8
0.6
6
10
180
30
0.3
10
±16
0.8
8
12
°C
°C
V
μA
mV
sec
sec
45.5
0.9
0.95
Ratings
typ
1.3
10
1.03
0.16
0.10
max
1.6
30
1.2
0.23
0.15
6
47
VCC
×0.2
6.0
6.0
mA
μA
V
V
V
mV
dB
V
V
V
Unit
* Design target: These values are the target value in designs. The parameters are not measured independently.
Pin Assignment
IN1
HB
IN2
OUT1
GND
1
2
3
4
5
10
9
8
7
6
RD
FG
PWM
VCC
OUT2
Top view
Truth value table
IN1
IN2
PWM
High
High
Low
Low
*
High
Low
High
Low
*
*
Low
High
Low
OFF
Low
Low
OFF
Low
Low
Low
OUT1
OUT2
High
Low
OFF
OFF
FG
RD
Low
Low
OFF
Low
Low
OFF
Low
Mode
Operation (OUT2→OUT1)
Recirculation
Lock protector (see *1)
Operation (OUT1→OUT2)
Recirculation
Lock protector (see *1)
Standby (see *2)
*1 If FG pulse is not switched when lock detection output is ON, lock protecdtor mode is set.
*2 Standby mode is set when time of lock protecdtor + PWM input low level voltage is greator than 750μs.
Standby mode is set when time of low level voltage is 750μs and voltage is supplied and PWM input is at low level voltage.
No.A2065-2/7
LV8163QA
Package Dimensions
unit : mm (typ)
3432
TOP VIEW
2.6
1.5
Pd max -- Ta
Specified board (105
×
120
×
1.6mm
3
, paper phenol)
Ambient temperature, Pd max -- W
2.6
1.05
1.0
SIDE VIEW
0.127
0.55 MAX
1 2
0.5
0.46
BOTTOM VIEW
0.35
2.125
1
5
0 to 0.05
0
--30
0
30
60
90
120
Ambient temperature, Ta --
°C
1.235
0.2 MIN
10
0.5
6
0.25
SANYO : UDFN10(2.6X2.6)
Block Diagram
LOCK
DETECTION
IN1
1
OSC
10
RD
CONTROL
HB
2
HB
TSD
9
VCC
500k
FG
IN2
3
10k
8
PWM
-
+
+
-
OUT1
4
7
VCC
GND
5
-
+
+
-
6
OUT2
No.A2065-3/7
LV8163QA
Example of circuit application
1 IN1
H
*3
*6
RD 10
FG 9
RDOUT
FGOUT
PWMIN
*1
*7
2 HB
*2
*5
3 IN2
4 OUT1
5 GND
*4
PWM 8
VCC 7
OUT2 6
*1 < Capacitor for power stabilization >
The capacitor for power stabilization must be 1μF or greater. The capacitor is not removable.
Make sure to connect the capacitor with the think and shortest possible pattern between VCC and GND.
When a protection diode against reverse connection is used. If supply voltage increases due to coil kickback, connect
zener diode between power supply and GND.
This IC performs synchronous rectification to reduce hest generation and to enhance efficiency.
Depends on usage conditions, coil current may flow back to power supply by synchronous rectification.
*when output DUTY is reduced rapidly.
*When PWM input frequency is low.
The increase of supply voltage varies depends on the presence of diode (to prevent IC descruction from reverse
connection), the size of power capacitor, and usage fan. If the increase of supply voltage is excessive, use capacitor
with enough capacitance or connect zener between power supply and GND so that the voltage is within the absolute
maximum ratings.
*2 < HB pin >
Constant voltage output pin, which is used as bias for Hall element.
When Hall element is biased from VCC line and HB pin is unused, HB pin should be pulled down to GND with
resistor of 1kΩ.
Bias for power supply and bias for HB pin cannot be used together.
Connect a resistor between Hall element and GND to adjust amplitude of Hall element.
*3 < IN1,IN2 pin >
Hall element signal input pin.
Make sure to keep the wiring short to prevent noise.
If noise is generated, use capacitor between IN1 and IN2.
As for Hall input level, the following conditions must be met:
Difference of voltage between IN1 and IN2
>
usage voltage / Hall amplifier gain + Hall amplifier input offset
No.A2065-4/7
LV8163QA
*4 < PWM pin >
Motor speed control sifnal input pin.
PWM pin is pulled up at 500kΩ in LV8136QA.
Resistance of 500kΩ is used for full-speed setting when PWM pin is open.
In order to control motor speed using open Collector input method (open drain), pull-up is required using suitable
resistance.
Pull-up resistance is not required when motor speed is controlled by Push-pull input method.
The order of power supply is optinal; either to power supply voltage or PWM input, under one of the following
conditions.
1) When open collector input method is used.
2) Pull-up resistance is not implemented and Push-pull input method is used.
It is recommended to connect a resistance greator than 1kΩ in series to protect PWM pin against open GND and
misconnection.
*5 < FG pin >
Used as rotation counter.
This pin is open drain output. You can count rotations according to phase change.
This pin is set to off during standby mode.
Make sure to set this pin open when unused.
It is recommended to connect a resistance greater than 1kΩ in series to protect PWM pin against open GND and
misconnection.
*6 < RD pin >
Used as lock detector.
This pin is open drain output. During rotation, RD pin is set to low-level voltage. During lock detection, it is set to off.
During standby, it is set to low-level voltage.
Make sure to set this pin open when unused.
It is recommended to connect a resistance greator than 1kΩ in series to protect PWM pin against open GND and
misconnection.
*7 < Low power dissipation during standby >
During standby, the fan motor used in LV8136QA can reduce power dissipation into 10µA (under room temperature,
Typ).
However, power dissipation cannot be reduced into 10µA under the following conditions.
•
When bias of Hall element is supplied from power supply:
→
Current flowing into Hall element increases.
•
When pull-up resistor is used to PWM pin
→
During standby, the current flowing into pull-up resistor increases because PWM pin must be set to low-level
voltage.
•
When using RD pin
→
During standby, the current flowing into pull-up resistor increases because RD pin turns low-level voltage.
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