PARAGON GB3225
Preconfigured DSP System
for Hearing Aids
Description
The Paragon GB3225 hybrid is a programmable DSP system based
on a multi−channel compression circuit. It can be used as a platform
for a wide range of hearing aid applications. Its extensive
programmability and compact size make it ideal for sophisticated CIC
applications. The reflowable thinSTAX
®
packaging enables easy
integration into BTE applications. This very versatile DSP hybrid is
capable of multiple configurations and has a wide range of functions.
The Paragon GB3225 hybrid contains the GC5057 controller chip
featuring Power On Reset (POR).
The Paragon GB3225 hybrid code programmed into the GC5057
controller chip is “9”.
Features
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14 PAD
PARAGON
CASE TBD
PAD CONNECTION
RREG
RMIC
RGND
VC
SDA
PGND
OUT−
7
6
5
4
3
2
1
8
9
10
11
12
13
14
FREG
FMIC
FGND
T
MS
VB
OUT+
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Highly Configurable, Versatile DSP Platform
High Fidelity, Multi−channel AGC Signal Processing
93 dB Input Dynamic Range with HRXt Headroom Extension
Fully Programmable via Serial Data Interface
High Performance Data Converters – Dual, Over−sampled A/Ds;
Over−sampled D/A with Efficient Switched−mode Output Power Amp
High−fidelity Audio Quality
Drives Zero−bias 2−terminal Receivers
Multiple Communication Rates up to 85.3 kb/s
thinSTAX Packaging
−
CIC Size
Multi−memory
Internal/External Volume Control
Volume Control Taper determined by External VC
Tri−state Memory Select Operation
Audible Memory Change Indicator
Also Available as E1 RoHS Compliant Hybrid
(Bottom View)
MARKING DIAGRAM
GB3225−E1
XXXXXX
GB3225
E1
XXXXXX
= Specific Device Code
= RoHS Compliant Hybrid
= Work Order Number
thinSTAX Packaging
•
Hybrid Typical Dimensions:
0.227 x 0.125 x 0.060 in
(5.76 x 3.18 x 1.52 mm)
ORDERING INFORMATION
Device
GB3225−E1
Shipping
†
25 Units / Bubble Pack
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2014
February, 2014
−
Rev. 2
1
Publication Order Number:
GB3225/D
PARAGON GB3225
BLOCK DIAGRAM
VC
4
RREG
FREG
FMIC
7
8
9
70n
FRONTWAVE
70n
RMIC
6
60n
CHANNEL 4
A/D
CHANNEL 3
T 11
CHANNEL 2
S
D/A
HBRIDGE
14 OUT+
1
OUT−
A/D
CHANNEL 1
205n REGULATOR
13n
VC
A/D
SDA
3
INTERFACE
EEPROM
MS
12
VB
13
GB3225
FGND 10
RGND
5
All resistors in ohms, all capacitors in farads unless otherwise stated.
2
PGND
Figure 1. Paragon GB3225 Block Diagram
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature Range
Storage Temperature Range
Absolute Maximum Power Dissipation
Maximum Operating Supply Voltage
Absolute Maximum Supply Voltage
Value
−10
to +40
−20
to +70
25
1.5
2
Units
°C
°C
mW
VDC
VDC
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
WARNING:
Electrostatic Sensitive Device
−
Do not open packages or handle except at a static−free workstation.
WARNING:
Moisture Sensitive Device
−
Non−RoHS Compliant
−
Level 3 MSL; RoHS Compliant
−
Level 4 MSL. Do not open packages
except under controlled conditions.
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2
PARAGON GB3225
Table 2. ELECTRICAL CHARACTERISTICS
(Conditions: V
B
= 1.3 V; Temperature = 25°C)
Parameter
Hybrid Current
Minimum Operating Supply Voltage
Supply Voltage Turn On Threshold
Supply Voltage Hysteresis
Supply Voltage during
Communication
Hybrid Current during Communication
EEPROM Burn Cycles
Low Frequency System Bandwidth
High Frequency System Bandwidth
Total Maximum System Gain
Converter Gain
Total Harmonic Distortion
THD at Maximum Input
Clock Frequency
REGULATOR
Regulator Voltage
Regulator Supply Rejection
INPUT
Input Referred Noise
Input Impedance
Anti−alias Filter Rejection
(input referred)
Maximum Input Level
Input Dynamic Range
Audio Sample Rate
A/D Dynamic Range
OUTPUT
Maximum RMS Output Voltage
D/A Dynamic Range
Output Impedance
VOLUME CONTROL
Volume Control Resistance
Volume Control Range
MS INPUT
Low State
Open State
High State
Lo
Z
Hi
−
−
−
0
V
REG
/3
2V
REG
/3
−
−
−
V
REG
/3
2V
REG
/3
V
B
V
V
V
R
VC
DA
−
−
160
47.5
200
48
240
48.5
kW
dB
−
−
Z
OUT
0 dBFS
f
= 1 kHz
Bandwidth 100 Hz
−
8 kHz
(Note 2)
−3
80
−
−1
−
−
1
−
20
dBV
dB
W
IRN
Z
IN
−
−
−
−
−
Bandwidth 100 Hz
−
8 kHz
−
f
=
f
clk
−
8 kHz,
V
IN
=
−40
dBV
−
HRX
−
ON,
Bandwidth 100 Hz
−
8 kHz
−
Bandwidth 100 Hz
−
8 kHz
−
11.2
−
−
−
30.4
−
−108
16
80
−15
93
32
86
−106
22
−
−
−
33.6
−
dBV
kW
dB
dBV
dB
kHz
dB
V
REG
PSRR
REG
−
−
0.90
−
0.95
50
1.00
−
V
dB
Symbol
I
AMP
V
BOFF
V
BON
−
V
BC
I
P
−
−
−
A
V
A
CONV
THD
THD
M
f
clk
Conditions
See current consumption section
Ramp down
Ramp up
−
During Communication
Programming (<5 ms)
(Note 2)
−
−
V
IN
=
−95
dBV at 3 kHz;
squelch disabled (Note 1)
A/D + D/A gain
V
IN
=
−40
dBV
V
IN
=
−15
dBV, HRX
−
ON
−
Min
−
0.94
1.06
90
1.19
−
100 k
100
15.2
81
27
−
−
1.945
Typ
700
1.0
1.10
100
1.35
3.7
−
140
16
83
29
0.05
1.5
2.048
Max
−
1.05
1.16
110
1.5
−
−
225
16.8
85
31
1
3
2.151
Units
mA
V
V
mV
V
mA
cycles
Hz
kHz
dB
dB
%
%
MHz
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Total System Gain consists of: Wideband System Gain + High and Low Independent Channel Gains + Converter Gain.
Total System Gain is calibrated during Cal/Config process.
2. Sample tested.
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3
PARAGON GB3225
Table 2. ELECTRICAL CHARACTERISTICS
(Conditions: V
B
= 1.3 V; Temperature = 25°C)
Parameter
SDA INPUT
Logic 0 Voltage
Logic 1 Voltage
SDA OUTPUT
Standby Pull Up Current
Sync Pull Up Current
Logic 0 Current (Pull Down)
Logic 1 Current (Pull Up)
Synchronization Time
(Synchronization Pulse Width)
−
−
−
−
T
SYNC
−
−
−
−
Baud = 0
Baud = 1
Baud = 2
Baud = 3
Baud = 4
Baud = 5
Baud = 6
Baud = 7
1.4
450
225
225
237
118
59
29.76
14.88
7.44
3.72
1.86
2
500
250
250
250
125
62.5
31.25
15.63
7.81
3.91
1.95
2.6
550
275
275
263
132
66
32.81
16.41
8.20
4.10
2.05
mA
mA
mA
mA
ms
−
−
(Note 2)
(Note 2)
0
1
−
−
0.3
1.3
V
V
Symbol
Conditions
Min
Typ
Max
Units
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Total System Gain consists of: Wideband System Gain + High and Low Independent Channel Gains + Converter Gain.
Total System Gain is calibrated during Cal/Config process.
2. Sample tested.
Support Software
All support software for the Paragon GB3225 is available from the ON Semiconductor website at
www.onsemi.com.
TYPICAL APPLICATIONS
200k
V
B
4
7
8
3k9
9
70nF
FRONTWAVE
70n
3k9
1k
6
11
60n
10
5
A/D
A/D
205n REGULATOR
13n
VC
A/D
3
INTERFACE
EEPROM
12
13
GB3225
CHANNEL 1
OUT
LP FILTER
1
CHANNEL 2
S
D/A
HBRIDGE
14
CHANNEL 3
CHANNEL 4
2
All resistors in ohms, all capacitors in farads unless otherwise stated.
Figure 2. Test Circuit
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4
PARAGON GB3225
TYPICAL APPLICATIONS (continued)
VC
200k
MS
3
INTERFACE
EEPROM
12
VB
4
7
8
9
70nF
FRONTWAVE
70n
6
T
11
60n
10
5
A/D
A/D
205n REGULATOR
13n
VC
A/D
13
GB3225
CHANNEL 1
CHANNEL 2
S
D/A
HBRIDGE
14
1
Knowles or
Sonion
zero−bias
receiver
CHANNEL 3
CHANNEL 4
2
All resistors in ohms, all capacitors in farads unless otherwise stated.
Knowles or Sonion microphones
Figure 3. Sample Application Circuit
T−coil
SW(N.O.)
Front
Mic
+
Zero Biased
Receiver
Rear
Mic
+
+
−
VC
CS44
Figure 4. Assembly Diagram
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5
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