AN1882
Application note
Designing with the L6926, high efficiency monolithic
synchronous step-down regulator
Introduction
This application note details the main features and application advantages of this new
synchronous step-down regulator. After describing how the device works and the main
features, a step-by-step design section is provided in order to aid in the selection of the
external components and in the evaluation of the losses. The device performances are
shown in terms of efficiency and thermal results. At the end, some application ideas are
proposed. This new product, designed using BCDV technology, is a high efficiency
monolithic synchronous step-down regulator capable of delivering up to 800 mA of
continuous output current and to regulate the output voltage from 0.6 V up to V
IN
thanks to
the 100% duty cycle operation capability. The input voltage ranges from 2 V to 5.5 V. The
control loop architecture is based on a constant frequency peak current mode, while high
efficiency at light loads is achieved by a low consumption functionality. The very low
quiescent current (25 µA) and shutdown current (0.2 µA) make the device very suitable to
supply battery-powered equipment like PDAs and hand-held terminals, DSCs (digital still
cameras) and cellular phones. The switching frequency is internally set at 600 kHz, but the
device can be externally synchronized up to 1.4 MHz. An internal reference voltage of 0.6 V
(typ) allows the device to regulate a minimum output voltage of the same low value. The low
MOSFETs R
DS(on)
ensures high efficiency at high output current. Additional beneficial
features are: hysteretic UVLO, OVP, constant current short-circuit protection, Power Good
and thermal shutdown. The MSOP8 package allows significant space savings on the board.
Figure 1.
Application test circuit
April 2012
Doc ID 10209 Rev 4
1/30
www.st.com
Contents
AN1882
Contents
1
2
3
Pins function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
Modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1.1
3.1.2
Low consumption mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Low noise mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2
System stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2.1
3.2.2
Current loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Voltage loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1
4.2
4.3
4.4
4.5
4.6
Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DROPOUT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
PGOOD (Power Good output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Adjustable output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OVP (over-voltage protection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1
External components selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.1
5.1.2
5.1.3
5.1.4
Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Compensation network (R1C3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.2
Losses and efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.2.1
5.2.2
5.2.3
Conduction losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Switching losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Gate charge losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6
7
2/30
Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Doc ID 10209 Rev 4
AN1882
Contents
8
9
Efficiency results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9.1
9.2
Buck boost topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
White LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9.2.1
9.2.2
9.2.3
Driving white LEDs: buck topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Driving white LEDs: boost topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Driving white LEDs: buck/boost topology . . . . . . . . . . . . . . . . . . . . . . . . 26
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Doc ID 10209 Rev 4
3/30
List of figures
AN1882
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Application test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pins connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
MSOP8 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Low consumption mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Low noise mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Slope compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Equivalent circuit for the voltage loop analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Equivalent circuits during the ON time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Equivalent circuit during the OFF time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Valley current limit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Thermal performance results: V
IN
= 3.7 V V
OUT
= 1.8 V I
OUT
= 800 mA . . . . . . . . . . . . . . 20
RDS(on) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Application board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Component placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Top side view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Bottom side view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Schematic demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Low noises vs. low consumption efficiencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Efficiency vs. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Efficiency vs. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Efficiency vs. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Positive buck boost application. 1 Li-Ion cell to 3.3 V@0.25 A . . . . . . . . . . . . . . . . . . . . . . 25
Buck topology schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boost topology schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Buck boost topology schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PWM brightness control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Analog brightness control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4/30
Doc ID 10209 Rev 4
AN1882
Pins function
1
Table 1.
N.
1
Name
RUN
Pins function
Pin description
Description
Shutdown input. When connected to a lower voltage than 0.5 V (down to GND) the device stops
working. When connected to a higher voltage than 1.3 V (up to VCC) the device is enabled. The pin
must not be left floating
Error amplifier output. A compensation network has to be connected from this pin to GND. Usually a
220 pF capacitor is enough to guarantee the loop stability (see related section)
Error amplifier inverting input, used to adjust the output voltage (from 0.6 V to VIN) by an external
divider.
Ground
Switch output node. Common point between high side and low side MOSFETs
Input voltage. The operating input voltage range is from 2 V to 5.5 V. An internal UVLO circuit
realizes a 200 mV (typ) hysteresis
Operating mode selector input. Low consumption mode, when connected to a higher voltage than
1.3 V (up to VCC). Low noise mode when connected to a lower than 0.5 V (down to GND).
Synchronization mode when connected to an external appropriate clock generator. This pin must
not be left floating
Power Good comparator output. It is an open drain output. A pull-up resistor should be connected
between Power Good and V
O
. The pin is forced low when the output voltage is lower than 90% of
the regulated output voltage and goes high when the output voltage is greater than 90% of the
regulated output voltage. If not used, the pin can be left floating.
2
3
4
5
6
7
COMP
VFB
GND
LX
V
CC
SYNC
8
PGOOD
Figure 2.
Pins connection
Figure 3.
MSOP8 package
Doc ID 10209 Rev 4
5/30
PCB设计
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