DISCRETE SEMICONDUCTORS
DATA SHEET
BTA204S series D, E and F
BTA204M series D, E and F
Three quadrant triacs guaranteed
commutation
Product specification
December 1998
Philips Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
GENERAL DESCRIPTION
Passivated guaranteed commutation
triacs in a plastic envelope suitable for
surface mounting, intended for use in
motor control circuits or with other
highly inductive loads. These devices
balance
the
requirements
of
commutation performance and gate
sensitivity. The "sensitive gate" E
series and "logic level" D series are
intended for interfacing with low power
drivers, including micro controllers.
BTA204S series D, E and F
BTA204M series D, E and F
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MAX. MAX.
600D
600E
600F
600
4
25
MAX. UNIT
-
800E
800F
800
4
25
BTA204S
(or BTA204M)-
500D
BTA204S
(or BTA204M)-
500E
BTA204S
(or BTA204M)-
500F
Repetitive peak
500
off-state voltages
RMS on-state current
4
Non-repetitive peak on-state 25
current
V
DRM
I
T(RMS)
I
TSM
V
A
A
PINNING - SOT428
PIN
Standard Alternative
NUMBER
S
M
1
2
3
tab
MT1
MT2
gate
MT2
gate
MT2
MT1
MT2
PIN CONFIGURATION
tab
SYMBOL
T2
T1
2
1
3
G
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
Repetitive peak off-state
voltages
RMS on-state current
Non-repetitive peak
on-state current
full sine wave;
T
mb
≤
107 ˚C
full sine wave;
T
j
= 25 ˚C prior to
surge
t = 20 ms
t = 16.7 ms
t = 10 ms
I
TM
= 6 A; I
G
= 0.2 A;
dI
G
/dt = 0.2 A/µs
CONDITIONS
MIN.
-
-
-500
500
1
MAX.
-600
600
1
4
-800
800
UNIT
V
A
I
2
t
dI
T
/dt
I
GM
V
GM
P
GM
P
G(AV)
T
stg
T
j
I
2
t for fusing
Repetitive rate of rise of
on-state current after
triggering
Peak gate current
Peak gate voltage
Peak gate power
Average gate power
Storage temperature
Operating junction
temperature
-
-
-
25
27
3.1
100
2
5
5
0.5
150
125
A
A
A
2
s
A/µs
A
V
W
W
˚C
˚C
over any 20 ms
period
-
-
-
-
-40
-
1
Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may
switch to the on-state. The rate of rise of current should not exceed 6 A/µs.
December 1998
2
Rev 1.000
Philips Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
CONDITIONS
BTA204S series D, E and F
BTA204M series D, E and F
MIN.
-
-
-
TYP.
-
-
75
MAX.
3.0
3.7
-
UNIT
K/W
K/W
K/W
Thermal resistance
full cycle
junction to mounting base half cycle
Thermal resistance
pcb (FR4) mounted; footprint as in Fig.14
junction to ambient
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
I
GT
PARAMETER
Gate trigger current
2
CONDITIONS
BTA204S
(or BTA204M)-
V
D
= 12 V; I
T
= 0.1 A
T2+ G+
T2+ G-
T2- G-
V
D
= 12 V; I
GT
= 0.1 A
T2+ G+
T2+ G-
T2- G-
V
D
= 12 V; I
GT
= 0.1 A
I
T
= 5 A
V
D
= 12 V; I
T
= 0.1 A
V
D
= 400 V; I
T
= 0.1 A;
T
j
= 125 ˚C
V
D
= V
DRM(max)
; T
j
= 125 ˚C
-
-
-
-
-
-
-
-
-
0.25
-
-
-
-
-
-
-
-
1.4
0.7
0.4
0.1
MIN.
TYP.
...D
5
5
5
6
9
6
6
MAX.
...E
10
10
10
12
18
12
12
1.7
1.5
-
0.5
...F
25
25
25
20
30
20
20
mA
mA
mA
mA
mA
mA
mA
V
V
V
mA
UNIT
I
L
Latching current
I
H
V
T
V
GT
Holding current
On-state voltage
Gate trigger voltage
I
D
Off-state leakage
current
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
dV
D
/dt
dI
com
/dt
PARAMETER
Critical rate of rise of
off-state voltage
CONDITIONS
BTA204S
(or BTA204M)-
...D
MIN.
...E
30
2.0
...F
50
2.5
-
-
-
-
V/µs
A/ms
TYP.
MAX.
UNIT
dI
com
/dt
t
gt
V
DM
= 67% V
DRM(max)
;
20
T
j
= 125 ˚C; exponential
waveform; gate open circuit
Critical rate of change V
DM
= 400 V; T
j
= 125 ˚C;
1.0
of commutating current I
T(RMS)
= 4 A;
dV
com
/dt = 20V/µs; gate
open circuit
Critical rate of change V
DM
= 400 V; T
j
= 125 ˚C;
5.0
of commutating current I
T(RMS)
= 4 A;
dV
com
/dt = 0.1V/µs; gate
open circuit
Gate controlled turn-on I
TM
= 12 A; V
D
= V
DRM(max)
;
-
time
I
G
= 0.1 A; dI
G
/dt = 5 A/µs
-
-
-
-
A/ms
-
-
2
-
µs
2
Device does not trigger in the T2-, G+ quadrant.
December 1998
3
Rev 1.000
Philips Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
BT136
BTA204S series D, E and F
BTA204M series D, E and F
IT(RMS) / A
BT136
8
7
6
5
4
3
2
1
0
Ptot / W
Tmb(max) / C
101
104
5
1
= 180
120
90
60
30
4
107
110
113
116
119
107 C
3
2
1
122
0
1
2
3
IT(RMS) / A
4
125
5
0
-50
0
50
Tmb / C
100
150
Fig.1. Maximum on-state dissipation, P
tot
, versus rms
on-state current, I
T(RMS)
, where
α
= conduction angle.
Fig.4. Maximum permissible rms current I
T(RMS)
,
versus mounting base temperature T
mb
.
BT136
1000
ITSM / A
BT136
IT
T
ITSM
12
10
time
IT(RMS) / A
Tj initial = 25 C max
100
dI
T
/dt limit
8
6
4
T2- G+ quadrant
2
10
10us
100us
1ms
T/s
10ms
100ms
0
0.01
0.1
1
surge duration / s
10
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
20ms.
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
mb
≤
107˚C.
VGT(Tj)
VGT(25 C)
30
25
20
15
10
5
0
ITSM / A
BT136
1.6
IT
T
I TSM
time
BT136
1.4
1.2
1
0.8
0.6
0.4
-50
Tj initial = 25 C max
1
10
100
Number of cycles at 50Hz
1000
0
50
Tj / C
100
150
Fig.3. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
December 1998
4
Rev 1.000
Philips Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
IGT(Tj)
IGT(25 C)
BTA204S series D, E and F
BTA204M series D, E and F
BT136
typ
max
BTA204
12
IT / A
Tj = 125 C
Tj = 25 C
3
2.5
2
1.5
1
0.5
T2+ G+
T2+ G-
T2- G-
10
Vo = 1.27 V
Rs = 0.091 ohms
8
6
4
2
0
0
-50
0
50
Tj / C
100
150
0
0.5
1
1.5
VT / V
2
2.5
3
Fig.7. Normalised gate trigger current
I
GT
(T
j
)/ I
GT
(25˚C), versus junction temperature T
j
.
IL(Tj)
IL(25 C)
Fig.10. Typical and maximum on-state characteristic.
3
2.5
TRIAC
10
Zth j-mb (K/W)
BT136
unidirectional
bidirectional
1
2
1.5
1
0.5
0
-50
0.01
10us
0.1ms
1ms
10ms
tp / s
0.1s
1s
0.1
P
D
tp
t
0
50
Tj / C
100
150
10s
Fig.8. Normalised latching current I
L
(T
j
)/ I
L
(25˚C),
versus junction temperature T
j
.
IH(Tj)
IH(25C)
Fig.11. Transient thermal impedance Z
th j-mb
, versus
pulse width t
p
.
3
2.5
2
1.5
1
0.5
TRIAC
0
-50
0
50
Tj / C
100
150
Fig.9. Normalised holding current I
H
(T
j
)/ I
H
(25˚C),
versus junction temperature T
j
.
December 1998
5
Rev 1.000
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
