PL602041
ClockWorks™ PCIe Quad Outputs
Ultra-Low Jitter, HCSL
Frequency Synthesizer
General Description
The PL602041 is a member of the ClockWorks family of
devices from Micrel and provides an extremely low-noise
timing solution for PCI Express clock signals.
The device operates from a 3.3V or 2.5V power supply
and synthesizes four HCSL output clocks at 25MHz,
100MHz, 125MHz, and 200MHz. The PL602041 accepts a
25MHz crystal.
Datasheets and support documentation are available on
Micrel’s web site at:
www.micrel.com.
Features
Input crystal frequency of 25MHz
Generates four HCSL clock outputs at 25MHz, 100MHz,
125MHz, and 200MHz
2.5V or 3.3V operating range
Typical phase jitter @ 100MHz
(1.875MHz to 20MHz): 105fs
Compliant with PCI Express Gen1, Gen2, and Gen3
Industrial temperature range (–40C to +85C)
RoHS and PFOS compliant
Available in 24-pin 4mm x 4mm QFN package
Applications
Servers
Storage systems
Switches and routers
Gigabit Ethernet
Set-top boxes/DVRs
_________________________________________________________________________________________________________________________
Block Diagram
ClockWorks and Ripple Blocker are trademarks of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
January 28, 2014
Revision 1.3
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
PL602041
Ordering Information
(1)
Part Number
PL602041UMG
PL602041UMG TR
Note:
1. Devices are RoHS and PFOS compliant.
Marking
PL602
041
PL602
041
Shipping
Tube
Tape and Reel
Junction Temperature Range
–40°C to +85°C
–40°C to +85°C
Package
24-Pin QFN
24-Pin QFN
Lead Finish
NiPdAu
NiPdAu
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
17, 18
19, 20
23, 24
1, 2
9
16, 21
3, 7
4, 5, 13, 22
6, 8
10
11
12
14, 15
Pin Name
/Q0, Q0
/Q1, Q1
/Q2, Q2
/Q3, Q3
VDDO2
VDDO1
VDD
VSS
S0, S1
XIN
XOUT
OE
NC
Pin Type
O, (DIF)
O, (DIF)
PWR
PWR
PWR
PWR
I
I, (SE)
O, (SE)
I, (SE)
LVCMOS
Crystal
Crystal
LVCMOS
Pin Level
HCSL
HCSL
Pin Function
Differential Clock Outputs Pairs.
Differential Clock Outputs Pairs.
Power Supply.
Power Supply.
Core Power Supply.
Power Supply Ground.
Frequency Select for 25MHz, 100MHZ, 125MHZ, and 200MHz. Each pin
has a 45K pull-up.
Crystal Input, no load caps needed (see
Figure 5).
Crystal Output, no load caps needed (see
Figure 5).
Output Enable/Disable.
No Connect.
January 28, 2014
2
Revision 1.3
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
PL602041
Absolute Maximum Ratings
(2)
Supply Voltage (V
DD
, V
DDO1/2
) ...................................... +4.6V
Input Voltage (V
IN
) ..............................
0.50V
to V
DD
+ 0.5V
Lead Temperature (soldering, 20s) ............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (T
S
) .........................
65C
to
150°C
Operating Ratings
(3)
Supply Voltage (V
DD
, V
DDO1/2
) ............... +2.375V to +3.465V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
(4)
Junction Thermal Resistance
QFN (
JA
) Still Air ............................................... 50°C/W
QFN (
JB
) Junction-to-Board ............................. 30°C/W
DC Electrical Characteristics
(5)
V
DD
= V
DDO1/2
= 3.3V
5%
or 2.5V
5%
V
DD
= 3.3V
5%,
V
DDO1/2
= 3.3V
5%
or 2.5V
5%
T
A
=
40C
to
85C.
Symbol
V
DD
, V
DDO1/2
V
DD
, V
DDO1/2
I
DD
Parameter
2.5V Operating Voltage
2.5V Operating Voltage
Supply Current to V
DD
+ V
DDO
Outputs 50Ω to V
SS
Condition
Min.
2.375
3.135
Typ.
2.5
3.3
150
Max.
2.625
3.465
185
Units
V
V
mA
HCSL DC Electrical Characteristics
(5)
V
DD
= V
DDO1/2
= 3.3V
5%
or 2.5V
5%
V
DD
= 3.3V
5%,
V
DDO1/2
= 3.3V
5%
or 2.5V
5%
T
A
=
40C
to
85C.
R
L
= 50Ω to V
SS
Symbol
V
OH
V
OL
V
CROSS
Parameter
Output High Voltage
Output Low Voltage
Crossing Point Voltage
Condition
Min.
660
150
250
Typ.
700
0
350
Max.
850
27
550
Units
mV
mV
mV
LVCMOS (S0, S1) DC Electrical Characteristics
(6)
V
DD
= 3.3V
5%,
or 2.5V
5%,
T
A
=
40C
to
85C.
Symbol
V
IH
V
IL
I
IH
I
IL
Notes:
2. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
3. The datasheet limits are not guaranteed if the device is operated beyond operating ratings.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
5. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
6. All phase noise measurements were taken with an Agilent 5052B phase noise system.
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Condition
Min.
2
0.3
Typ.
Max.
V
DD
+ 0.3
0.8
150
Units
V
V
A
A
V
DD
=
V
IN
= 3.465V
V
DD
= 3.465V,
V
IN
= 0V
150
January 28, 2014
3
Revision 1.3
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
PL602041
Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
1
10
Condition
10pF load capacitance
Min.
Typ.
Max.
Units
Fundamental, Parallel Resonant
25
50
5
100
MHz
Ω
pF
W
AC Electrical Characteristics
(6,
7)
V
DD
= V
DDO1/2
= 3.3V
5%
or 2.5V
5%
V
DD
= 3.3V
5%,
V
DDO1/2
= 3.3V
5%
or 2.5V
5%
T
A
=
40C
to
85C.
R
L
= 50Ω to V
SS
Symbol
Parameter
Condition
Min.
Typ.
25,
100,
125,
200
25
20% – 80%
150
48
Note
7
300
50
450
52
45
20
(8)
Max.
Units
F
OUT
Output Frequency
MHz
F
REF
T
R
/T
F
ODC
T
SKEW
T
LOCK
T
JIT
()
Notes:
Crystal Input Frequency
HCSL Output Rise/Fall Time
Output Duty Cycle
Output-to-Output Skew
PLL Lock Time
RMS Phase Jitter
100MHz
Integration Range (1.875MHz–20MHz)
Integration Range (12kHz–20MHz)
MHz
ps
%
ps
ms
fs
105
250
7. Defined as skew between outputs at the same supply voltage and with equal load conditions; measured at the output differential crossing points.
8. Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
Truth Tables
S1
0
0
1
1
S0
0
1
0
1
OUTPUT
25MHz
100MHz
125MHz
200MHz
January 28, 2014
4
Revision 1.3
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
PL602041
Phase Noise Plots
Phase Noise Plot: 100MHz, 1.875MHz20MHz 104fs
Phase Noise Plot: 100MHz, 12kHz20MHz 242fs
January 28, 2014
5
Revision 1.3
tcghelp@micrel.com
or (408) 955-1690
FPGA/CPLD
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