for digitizing high frequency, wide dynamic range signals
with input frequencies up to 700MHz. The input range of
the ADC can be optimized with the PGA front end.
The LTC2209 is perfect for demanding communications
applications, with AC performance that includes 77.3dBFS
Noise Floor and 100dB spurious free dynamic range
(SFDR). Ultra low jitter of 70fs
RMS
allows undersampling
of high input frequencies with excellent noise performance.
Maximum DC specs include ±5.5LSB INL, ±1LSB DNL (no
missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for
the CMOS outputs: a single bus running at the full data
rate or demultiplexed busses running at half data rate. A
separate output power supply allows the CMOS output
swing to range from 0.5V to 3.6V.
The ENC
+
and ENC
–
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n
Sample Rate: 160Msps
77.3dBFS Noise Floor
100dB SFDR
SFDR >84dB at 250MHz (1.5V
P-P
Input Range)
PGA Front End (2.25V
P-P
or 1.5V
P-P
Input Range)
700MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
LVDS or CMOS Outputs
Single 3.3V Supply
Power Dissipation: 1.53W
Clock Duty Cycle Stabilizer
Pin-Compatible Family:
130Msps: LTC2208 (16-Bit), LTC2208-14 (14-Bit)
105Msps: LTC2217 (16-Bit)
64-Pin (9mm
×
9mm) QFN Package
applications
n
n
n
n
n
n
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
typical application
3.3V
SENSE
V
CM
2.2µF
A
IN +
ANALOG
INPUT
A
IN –
1.25V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV
DD
0.5V TO 3.6V
1µF
OF
CLKOUT
D15
•
•
•
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
V
DD
GND
PGA
SHDN
DITH
MODE
LVDS
RAND
1µF
1µF
3.3V
1µF
2209 TA01
64k Point FFT, f
IN
= 15.1MHz,
–1dBFS, PGA = 0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–
S/H
AMP
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CMOS
OR
LVDS
AMPLITUDE (dBFS)
+
0
10
20
ENC
+
ENC
–
30 40 50 60
FREQUENCY (MHz)
70
80
2209 TA01b
ADC CONTROL INPUTS
2209fb
1
LTC2209
absolute MaxiMuM ratings
OV
DD
= V
DD
(Notes 1 and 2)
pin conFiguration
TOP VIEW
64 PGA
63 RAND
62 MODE
61 LVDS
60 OF
+
/OFA
59 OF
–
/DA15
58 D15
+
/DA14
57 D15
–
/DA13
56 D14
+
/DA12
55 D14
–
/DA11
54 D13
+
/DA10
53 D13
–
/DA9
52 D12
+
/DA8
51 D12
–
/DA7
50 OGND
49 OV
DD
SENSE 1
GND 2
V
CM
3
GND 4
V
DD
5
V
DD
6
GND 7
A
IN +
8
A
IN –
9
GND 10
GND 11
ENC
+
12
ENC
–
13
GND 14
V
DD
15
V
DD
16
65
GND
48 D11
+
/DA6
47 D11
–
/DA5
46 D10
+
/DA4
45 D10
–
/DA3
44 D9
+
/DA2
43 D9
–
/DA1
42 D8
+
/DA0
41 D8
–
/CLKOUTA
40 CLKOUT
+
/CLKOUTB
39 CLKOUT
–
/OFB
38 D7
+
/DB15
37 D7
–
/DB14
36 D6
+
/DB13
35 D6
–
/DB12
34 D5
+
/DB11
33 D5
–
/DB10
Supply Voltage (V
DD
) ................................... –0.3V to 4V
Digital Output Ground Voltage (OGND) ........ –0.3V to 1V
Analog Input Voltage (Note 3) ...... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage..................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 2500mW
Operating Temperature Range
LTC2209C ................................................ 0°C to 70°C
LTC2209I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Digital Output Supply Voltage (OV
DD
) .......... –0.3V to 4V
T
JMAX
= 150°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
orDer inForMation
LEAD FREE FINISH
LTC2209CUP#PBF
LTC2209IUP#PBF
LEAD BASED FINISH
LTC2209CUP
LTC2209IUP
TAPE AND REEL
LTC2209CUP#TRPBF
LTC2209IUP#TRPBF
TAPE AND REEL
LTC2209CUP#TR
LTC2209IUP#TR
PART MARKING*
LTC2209UP
LTC2209UP
PART MARKING*
LTC2209UP
LTC2209UP
PACKAGE DESCRIPTION
64-Lead (9mm
×
9mm) Plastic QFN
64-Lead (9mm
×
9mm) Plastic QFN
PACKAGE DESCRIPTION
64-Lead (9mm
×
9mm) Plastic QFN
64-Lead (9mm
×
9mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
PARAMETER
Integral Linearity Error
Differential Linearity Error
Offset Error
Offset Drift
Gain Error
Full-Scale Drift
Transition Noise
External Reference
Internal Reference
External Reference
External Reference
CONDITIONS
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
converter characteristics
The
l
denotes the specifications which apply over the full operating
MIN
l
l
l
V
DD
17
GND 18
SHDN 19
DITH 20
D0
–
/DB0 21
DO
+
/DB1 22
D1
–
/DB2 23
D1
+
/DB3 24
D2
–
/DB4 25
D2
+
/DB5 26
D3
–
/DB6 27
D3
+
/DB7 28
D4
–
/DB8 29
D4
+
/DB9 30
OGND 31
OV
DD
32
TYP
±1.5
±0.3
±2
±10
±0.2
±30
±15
3
MAX
±5.5
±1
±10
±2
UNITS
LSB
LSB
mV
µV/
°C
%FS
ppm/°C
ppm/°C
l
LSB
RMS
2209fb
2
LTC2209
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
SYMBOL
V
IN
V
IN, CM
I
IN
I
SENSE
I
MODE
I
LVDS
C
IN
t
AP
t
JITTER
CMRR
BW-3dB
PARAMETER
Analog Input Range (A
IN+
–
A
IN–
)
Analog Input Common Mode
Analog Input Leakage Current
SENSE Input Leakage Current
MODE Pin Pull-Down Current to GND
LVDS Pin Pull-Down Current to GND
Analog Input Capacitance
Sample-and-Hold
Aperture Delay Time
Sample-and-Hold
Acquisition Delay Time Jitter
Analog Input
Common Mode Rejection Ratio
Full Power Bandwidth
1V < (A
IN+
= A
IN–
) <1.5V
R
S
< 25Ω
Sample Mode ENC
+
< ENC
–
Hold Mode ENC
+
> ENC
–
CONDITIONS
3.135V ≤ V
DD
≤ 3.465V
Differential Input (Note 7)
0V ≤ A
IN+
,
A
IN–
≤ V
DD
0V ≤ SENSE ≤ V
DD
l
l
l
analog input
MIN
1
–1
–3
TYP
1.5 or 2.25
1.25
MAX
1.5
1
3
UNITS
V
P-P
V
µA
µA
µA
µA
pF
pF
ns
fs RMS
dB
MHz
10
10
6.6
1.8
1.0
70
80
700
DynaMic accuracy
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input (2.25V Range, PGA = 0)
5MHz Input (1.5V Range, PGA = 1)
30MHz Input (2.25V Range, PGA = 0)
30MHz Input (1.5V Range, PGA = 1)
70MHz Input (2.25V Range, PGA = 0)
70MHz Input (1.5V Range, PGA = 1)
140MHz Input (2.25V Range, PGA = 0)
140MHz Input (1.5V Range, PGA = 1)
250MHz Input (2.25V Range, PGA = 0)
250MHz Input (1.5V Range, PGA =1 )
SFDR
Spurious Free
Dynamic Range
2
nd
or 3
rd
Harmonic
5MHz Input (2.25V Range, PGA = 0)
5MHz Input (1.5V Range, PGA = 1)
30MHz Input (2.25V Range, PGA = 0)
30MHz Input (1.5V Range, PGA = 1)
70MHz Input (2.25V Range, PGA = 0)
70MHz Input (1.5V Range, PGA = 1)
140MHz Input (2.25V Range, PGA = 0)
140MHz Input (1.5V Range, PGA = 1)
250MHz Input (2.25V Range, PGA = 0)
250MHz Input (1.5V Range, PGA = 1)
l
l
l
l
MIN
TYP
77.1
75
MAX
UNITS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
75.5
76.8
74.9
76.9
74.7
71.9
76.6
73.9
75
73.5
100
100
84
94
100
88
88
81
84
88
75
84
2209fb
3
LTC2209
DynaMic accuracy
SYMBOL
SFDR
PARAMETER
Spurious Free
Dynamic Range
4
th
Harmonic or Higher
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS unless otherwise noted. (Note 4)
CONDITIONS
5MHz Input (2.25V Range, PGA = 0)
5MHz Input (1.5V Range, PGA = 1)
30MHz Input (2.25V Range, PGA = 0)
30MHz Input (1.5V Range, PGA = 1)
70MHz Input (2.25V Range, PGA = 0)
70MHz Input (1.5V Range, PGA = 1)
140MHz Input (2.25V Range, PGA = 0)
140MHz Input (1.5V Range, PGA = 1)
250MHz Input (2.25V Range, PGA = 0)
250MHz Input (1.5V Range, PGA = 1)
S/(N+D)
Signal-to-Noise Plus Distortion
Ratio
5MHz Input (2.25V Range, PGA = 0)
5MHz Input (1.5V Range, PGA = 1)
30MHz Input (2.25V Range, PGA = 0)
30MHz Input (1.5V Range, PGA = 1)
70MHz Input (2.25V Range, PGA = 0)
70MHz Input (1.5V Range, PGA = 1)
140MHz Input (2.25V Range, PGA = 0)
140MHz Input (1.5V Range, PGA = 1)
250MHz Input (2.25V Range, PGA = 0)
250MHz Input (1.5V Range, PGA = 1)
SFDR
Spurious Free Dynamic Range at
–25dBFS
Dither “OFF”
5MHz Input (2.25V Range, PGA = 0)
5MHz Input (1.5V Range, PGA = 1)
30MHz Input (2.25V Range, PGA = 0)
30MHz Input (1.5V Range, PGA = 1)
70MHz Input (2.25V Range, PGA = 0)
70MHz Input (1.5V Range, PGA = 1)
140MHz Input (2.25V Range, PGA = 0)
140MHz Input (1.5V Range, PGA = 1)
250MHz Input (2.25V Range, PGA = 0)
250MHz Input (1.5V Range, PGA = 1)
SFDR
Spurious Free Dynamic Range at
–25dBFS
Dither “ON”
5MHz Input (2.25V Range, PGA = 0)
5MHz Input (1.5V Range, PGA = 1)
30MHz Input (2.25V Range, PGA = 0)
30MHz Input (1.5V Range, PGA = 1)
70MHz Input (2.25V Range, PGA = 0)
70MHz Input (1.5V Range, PGA = 1)
140MHz Input (2.25V Range, PGA = 0)
140MHz Input (1.5V Range, PGA = 1)
250MHz Input (2.25V Range, PGA = 0)
250MHz Input (1.5V Range, PGA = 1)
l
l
l
l
l
MIN
TYP
100
100
MAX
UNITS
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
88
100
100
100
100
84
95
95
90
90
77.1
75
75.3
76.7
74.9
76.8
74.7
71.7
75.7
74.2
73.3
72.6
105
105
105
105
105
105
100
100
100
100
115
115
100
115
115
115
115
110
110
105
105
2209fb
4
LTC2209
coMMon MoDe bias characteristics
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
I
OUT
= 0
3.135V ≤ V
DD
≤ 3.465V
1mA ≤ | I
OUT
| ≤ 1mA
The
l
denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
1.15
TYP
1.25
+40
1
2
MAX
1.35
UNITS
V
ppm/°C
mV/ V
Ω
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
IEC 61000-3-2 is the leading spec for PFC Harmonic limits EN61000-3-2 in Europe
BSEN 61000-3-2 in UK
JIC-C-61000-3-2 in Japan
GB 17625.1 in China
PF>0.7 for Residential ......
Warning: Only 16bit will be pushed to the stack. Use size specifier to avoid warning. C:\Documents and Settings\Administrator\桌面\UCOS_II\Port\Os_cpu_a.s43 216
用430F2418单片机 ......
2008年8月26-29日，华南地区的五大品牌工业展会——NEPCON / EMT 华南展（第十四届华南国际电子生产设备暨微电子工业展/华南国际电子制造技术展览会）、华南国际汽车电子展（AE South China）、华南国际工业组装技术与装备展览会（ATE South China）和华南国际平面显示器制造技术展（Finetech South China）将在深圳会展中心隆重举行。从组委会获...[详细]
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