LTC1274/LTC1277
12-Bit, 10mW, 100ksps
ADCs with 1µA Shutdown
FEATURES
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DESCRIPTIO
Low Power Dissipation: 10mW
Sample Rate: 100ksps
Samples Inputs Beyond Nyquist, 72dB S/(N + D)
and 82dB THD at f
IN
= 100kHz
Single Supply 5V or
±5V
Operation
Power Shutdown to 1µA in Sleep Mode
180µA Nap Mode (LTC1277) with Instant Wake-Up
Internal Reference Can Be Overdriven
Internal Synchronized Clock
0V to 4.096V or
±2.048V
Input Ranges (1mV/LSB)
24-Lead SO Package
The LTC
®
1274/LTC1277 are 8µs sampling 12-bit A/D
converters which draw only 2mA (typ) from single 5V or
±5V
supplies. These easy-to-use devices come complete
with a 2µs sample-and-hold, a precision reference and an
internally trimmed clock. Unipolar and bipolar conversion
modes add to the flexibility of the ADCs.
Two power-down modes are available in the LTC1277. In
Nap mode, the LTC1277 draws only 180µA and the instant
wake-up from Nap mode allows the LTC1277 to be pow-
ered down even during brief inactive periods. In Sleep
mode only 1µA will be drawn. A REFRDY signal is used to
show the ADC is ready to sample after waking up from
Sleep mode. The LTC1274 also provides the Sleep mode
and REFRDY signal.
The A/D converters convert 0V to 4.096V unipolar inputs
from a single 5V supply or
±2.048V
bipolar inputs from
±5V
supplies.
The LTC1274 has a single-ended input and a 12-bit
parallel data format. The LTC1277 offers a differential
input and a 2-byte read format. The bipolar mode is
formatted as 2’s complement for the LTC1274 and offset
binary for the LTC1277.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
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Battery-Powered Portable Systems
High Speed Data Acquisition for PCs
Digital Signal Processing
Multiplexed Data Acquisition Systems
Audio and Telecom Processing
Spectrum Analysis
TYPICAL APPLICATI
Single 5V Supply, 10mW, 100kHz, 12-Bit ADC
LTC1277
1
ANALOG
V
DD
A
IN+
DIFFERENTIAL INPUTS 2
–
A
IN
V
SS
(0V TO 4.096V)
3
2.42V
V
REF
BUSY
V
REF
OUTPUT
+
4
CS
AGND
0.1µF
10µF
5
RD
REFRDY
6
CONVST
SLEEP
7
HBEN
NAP
8
V
LOGIC
D7
9
D6
D0/8
10
D5
D1/9
8-BIT
11
D4
D2/10
PARALLEL
12
BUS
DGND
D3/11
5V
24
23
22
21
20
19
18
17
16
15
14
13
OPTIONAL 3V SUPPLY
TO INTERFACE WITH 3V
PROCESSOR
10µF
µP
CONTROL
LINES
10000
C
REF
= 4.7µF
0.1µF
+
SUPPLY CURRENT (µA)
1000
100
NAP = REFRDY
(SLEEP MODE)
10
NAP = 5V
(SLEEP MODE)
1
0.1
LTC1274/77 • TA01
U
Supply Current vs Sample Rate with
Sleep and Nap Modes
WITHOUT SLEEP OR NAP
NAP MODE
1
10
100
1k
10k
100k
SAMPLE RATE (Hz)
LTC1274/77 • TA02
UO
UO
1
LTC1274/LTC1277
ABSOLUTE
(Notes 1, 2)
AXI U
RATI GS
Digital Output Voltage
Unipolar Operation ................... – 0.3V to V
DD
+ 0.3V
Bipolar Operation...................... – 0.3V to V
DD
+ 0.3V
Power Dissipation ............................................. 500mW
Operating Temperature Range
Commercial ............................................ 0°C to 70°C
Industrial ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
Supply Voltage (V
DD
) ................................................ 7V
Negative Supply Voltage (V
SS
)
Bipolar Operation Only .......................... – 6V to GND
Total Supply Voltage (V
DD
to V
SS
)
Bipolar Operation Only ....................................... 12V
Analog Input Voltage (Note 3)
Unipolar Operation ................... – 0.3V to V
DD
+ 0.3V
Bipolar Operation............... V
SS
– 0.3V to V
DD
+ 0.3V
Digital Input Voltage (Note 4)
Unipolar Operation .............................. – 0.3V to 12V
Bipolar Operation.......................... V
SS
– 0.3V to 12V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
A
IN
V
REF
AGND
D11 (MSB)
D10
D9
D8
D7
D6
1
2
3
4
5
6
7
8
9
24 V
DD
23 V
SS
22 BUSY
21 CS
20 RD
19 CONVST
18 SLEEP
17 REFRDY
16 D0
15 D1
14 D2
13 D3
ORDER
PART NUMBER
LTC1274CSW
LTC1274ISW
D5 10
D4 11
DGND 12
SW PACKAGE
24-LEAD PLASTIC SO WIDE
T
JMAX
= 110°C,
θ
JA
= 130°C/W
Consult factory for Military grade parts.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Unipolar Offset Error
(Note 7)
CONDITIONS
Bipolar Offset Error
Gain Error
Gain Error Tempco
(Note 8)
●
I
OUT(REF)
= 0
2
U
U
W
W W
U
W
TOP VIEW
A
IN+
A
IN–
V
REF
AGND
REFRDY
SLEEP
NAP
D7
D6
1
2
3
4
5
6
7
8
9
24 V
DD
23 V
SS
22 BUSY
21 CS
20 RD
19 CONVST
18 HBEN
17 V
LOGIC
16 D0/8
15 D1/9
14 D2/10
13 D3/11
(D11 = MSB)
ORDER
PART NUMBER
LTC1277CSW
LTC1277ISW
D5 10
D4 11
DGND 12
SW PACKAGE
24-LEAD PLASTIC SO WIDE
T
JMAX
= 110°C,
θ
JA
= 130°C/W
U
With Internal Reference (Notes 5, 6)
MIN
●
●
●
●
TYP
MAX
±1
±1
±6
±8
±8
±10
±20
UNITS
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
12
●
±10
±45
LTC1274/LTC1277
A ALOG I PUT
SYMBOL PARAMETER
V
IN
I
IN
C
IN
Analog Input Range (Note 10)
Analog Input Leakage Current
Analog Input Capacitance
DY A IC ACCURACY
SYMBOL PARAMETER
S/(N + D) Signal-to-Noise
Plus Distortion Ratio
THD
Total Harmonic Distortion
Up to 5th Harmonic
Peak Harmonic or
Spurious Noise
IMD
Intermodulation Distortion
Full Power Bandwidth
Full Linear Bandwidth
[S/(N + D)
≥
68dB]
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Load Regulation
CONDITIONS
I
OUT
= 0
I
OUT
= 0
4.75V
≤
V
DD
≤
5.25V
– 5.25V
≤
V
SS
≤
– 4.75V
– 5mA
≤
I
OUT
≤
70µA
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL PARAMETER
V
IH
V
IL
I
IN
C
IN
V
OH
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage, All Logic Outputs
V
DD
= 4.75V
I
O
= – 10µA
I
O
= – 200µA
V
LOGIC
= 2.7V (LTC1277)
I
O
= – 10µA
I
O
= – 200µA
V
OL
Low Level Output Voltage,
All Logic Outputs
V
DD
= 4.75V
I
O
= 160µA
I
O
= 1.6mA
V
LOGIC
=2.7V (LTC1277)
I
O
= 160µA
I
O
= 1.6mA
CONDITIONS
V
DD
= 5.25V
V
DD
= 4.75V
V
IN
= 0V to V
DD
U
U
U
U
W U
U
U
(Note 5)
CONDITIONS
4.75V
≤
V
DD
≤
5.25V (Unipolar)
4.75V
≤
V
DD
≤
5.25V, – 5.25V
≤
V
SS
≤
– 2.45V (Bipolar)
CS = High
Between Conversions (Sample Mode)
During Conversions (Hold Mode)
●
●
●
MIN
TYP
0 to 4.096
±2.048
MAX
UNITS
V
V
±1
45
5
µA
pF
pF
(Notes 5, 9)
CONDITIONS
50kHz Input Signal
100kHz Input Signal
50kHz Input Signal
100kHz Input Signal
50kHz Input Signal
100kHz Input Signal
fa = 96.95kHz, fb = 97.68kHz
2nd Order Terms
3rd Order Terms
●
●
●
MIN
70
TYP
73
72.5
– 84
– 82
– 84
– 82
– 78
– 81
2
350
MAX
UNITS
dB
dB
– 76
– 76
dB
dB
dB
dB
dB
dB
MHz
kHz
U
(Note 5)
MIN
2.400
●
TYP
2.420
±10
0.01
0.01
2
MAX
2.440
±45
UNITS
V
ppm/°C
LSB/V
LSB/V
LSB/mA
(Note 5)
MIN
●
●
●
TYP
MAX
0.8
±10
UNITS
V
V
µA
pF
V
V
V
V
V
V
V
V
2.4
5
4.70
●
4.0
2.65
2.60
0.05
0.10
0.05
0.10
●
0.4
3
LTC1274/LTC1277
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL PARAMETER
I
OZ
C
OZ
I
SOURCE
I
SINK
High-Z Output Leakage D11 to D0/8
High-Z Output Capacitance D11 to D0/8
Output Source Current
Output Sink Current
CONDITIONS
V
OUT
= 0V to V
DD
, CS High
CS High (Note 10)
V
OUT
= 0V
V
OUT
= V
DD
POWER REQUIRE E TS
SYMBOL PARAMETER
V
DD
V
LOGIC
V
SS
I
DD
Positive Supply Voltage (Notes 11, 12)
Logic Supply (Notes 11,12)
Negative Supply Voltage (Note 11)
Positive Supply Current
I
SS
P
DISS
Negative Supply Current
Power Dissipation
TI I G CHARACTERISTICS
SYMBOL
f
SAMPLE(MAX)
t
CONV
t
ACQ
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
CS↓ to RD↓ Setup Time
CS↓ to CONVST↓ Setup Time
NAP↑ to CONVST↓ Wake-Up Time
CONVST Low Time
CONVST↓ to BUSY↓ Delay
Data Ready Before BUSY↑
Delay Between Conversions
Wait Time RD↓ After BUSY↑
Data Access Time After RD↓
t
10
t
11
t
12
t
13
t
14
t
15
Bus Relinquish Time
RD Low Time
CONVST High Time
Aperture Delay of Sample-and-Hold
SLEEP↑ to REFRDY↑ Wake-Up Time 10µF Bypass at V
REF
Pin
4.7µF Bypass at V
REF
Pin
HBEN↑ to High Byte Data Valid
C
L
= 100pF (LTC1277 Only)
●
4
U W
U
U
(Note 5)
MIN
●
●
TYP
MAX
±10
15
UNITS
µA
pF
mA
mA
– 10
10
(Note 5)
CONDITIONS
Unipolar and Bipolar Mode
Unipolar and Bipolar Mode (LTC1277)
Bipolar Mode Only
f
SAMPLE
= 100ksps
NAP = 0V (LTC1277 Only)
SLEEP = 0V
f
SAMPLE
= 100ksps, Bipolar Mode Only
SLEEP = 0V
f
SAMPLE
= 100ksps
NAP = 0V (LTC1277 Only)
SLEEP = 0V (Unipolar/Bipolar)
●
●
●
●
●
●
●
●
MIN
4.75
TYP
2.7 to 5.25
MAX
5.25
– 5.25
UNITS
V
V
V
mA
µA
µA
µA
µA
mW
mW
µW
– 2.45
2
180
0.3
40
0.3
10
0.9
4
320
5
70
5
20
1.8
25/50
UW
(Note 5) See Figures 13 to 17.
MIN
●
●
●
CONDITIONS
(Note 11)
TYP
6
0.35
MAX
8
2
UNITS
ksps
µs
µs
ns
ns
100
(Note 10)
(Note 10)
(LTC1277 Only) (Note 11)
(Note 13)
C
L
= 100pF
C
L
= 100pF
(Note 11)
(Note 10)
C
L
= 20pF (Note 10)
●
●
●
●
●
●
●
●
0
30
620
40
70
20
– 20
50
65
110
140
125
170
90
100
65
0.35
2
150
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
L
= 100pF
●
C
L
= 100pF
●
20
20
t
9
40
60
(Note 10)
(Notes 10, 13)
●
●
35
4.2
3.3
35
100
ns
ms
ms
ns
LTC1274/LTC1277
TI I G CHARACTERISTICS
SYMBOL
t
16
t
17
t
18
PARAMETER
HBEN↓ to Low Byte Data Valid
HBEN↑ to RD↓ Setup Time
RD↑ to HBEN↓ Setup Time
The
●
denotes specifications which apply over the full operating
temperature range; all other limits and typicals T
A
= 25°C.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND and
AGND wired together and V
LOGIC
is tied to V
DD
in LTC1277 (unless
otherwise noted).
Note 3:
When these pin voltages are taken below V
SS
(ground for unipolar
mode) or above V
DD
, they will be clamped by internal diodes. This product
can handle input currents greater than 60mA below V
SS
(ground for
unipolar mode) or above V
DD
without latch-up.
Note 4:
When these pin voltages are taken below V
SS
(ground for unipolar
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 60mA below V
SS
(ground for unipolar mode)
without latch-up. These pins are not clamped to V
DD
.
Note 5:
V
DD
= 5V (V
SS
= – 5V for bipolar mode), V
LOGIC
= V
DD
(LTC1277),
f
SAMPLE
= 100ksps, t
r
= t
f
= 5ns unless otherwise specified.
Note 6:
Linearity, offset and full-scale specifications apply for unipolar and
bipolar modes.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity vs
Output Code
DIFFERENTIAL NONLINEARITY ERROR (LSB)
1.00
INTEGRAL NONLINEARITY ERROR (LSB)
EFFECTIVE NUMBER OF BITS (ENOBs)
f
SAMPLE
= 100kHz
0.50
0
–0.50
–1.00
0
512 1024 1536 2048 2560 3072 3584 4096
OUTPUT CODE
LT1274/77 • TPC01
U W
UW
(Note 5) See Figures 13 to 17.
MIN
●
●
●
CONDITIONS
C
L
= 100pF (LTC1277 Only)
(Note 10) (LTC1277 Only)
(Note 10) (LTC1277 Only)
TYP
45
MAX
100
UNITS
ns
ns
ns
10
10
Note 8:
For LTC1274, bipolar offset is the offset voltage measured from
– 0.5LSB when the output code flickers between 0000 0000 0000 and
1111 1111 1111. For LTC1277, bipolar offset voltage is measured from
– 0.5LSB when the output code flickers between 0111 1111 1111 and
1000 0000 0000.
Note 9:
The AC tests apply to bipolar mode only and the S/(N + D) is 71dB
(typ) for unipolar mode at 100kHz input frequency.
Note 10:
Guaranteed by design, not subject to test.
Note 11:
Recommended operating conditions.
Note 12:
A
IN
must not exceed V
DD
or fall below V
SS
by more than 50mV to
specified accuracy.
Note 13:
The falling CONVST edge starts a conversion. If CONVST returns
high at a bit decision point during the conversion it can create small
errors. For best performance ensure that CONVST returns high either
within 400ns after conversion start (i.e., before the first bit decision) or
after BUSY rises (i.e., after the last bit test). See timing diagrams Modes
1a and 1b (Figures 13, 14).
Differential Nonlinearity vs
Output Code
1.00
f
SAMPLE
= 100kHz
0.50
12
11
10
9
8
7
6
5
4
3
2
1
ENOBs and S/(N + D) vs
Input Frequency
74
68
NYQUIST
FREQUENCY
62
56
50
S/(N + D)(dB)
0
–0.50
f
SAMPLE
= 100kHz
100k
INPUT FREQUENCY (Hz)
1M
2M
–1.00
0
512 1024 1536 2048 2560 3072 3584 4096
OUTPUT CODE
LT1274/77 • TPC02
0
10k
LTC1274/77 • TPC03
5
微控制器 MCU
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