74VHC221A Dual Non-Retriggerable Monostable Multivibrator
May 2007
74VHC221A
Dual Non-Retriggerable Monostable Multivibrator
Features
■
High Speed: t
PD
=
8.1ns (Typ.) at V
CC
=
5V
■
Low Power Dissipation: I
CC
=
4µA (Max.) at T
A
=
25°C
■
Active State: I
CC
=
600µA (Max.) at T
A
=
25°C
■
High Noise Immunity: V
NIH
=
V
NIL
=
28% V
CC
(Min.)
■
Power down protection is provided on all inputs
■
Pin and function compatible with 74HC221A
tm
General Description
The VHC221A is an advanced high speed CMOS
Monostable Multivibrator fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while main-
taining the CMOS low power dissipation. Each multi-
vibrator features both a negative, A, and a positive, B,
transition triggered input, either of which can be used as
an inhibit input. Also included is a clear input that when
taken LOW resets the one-shot. The VHC221A can be
triggered on the positive transition of the clear while A is
held LOW and B is held HIGH. The VHC221A is non-
retriggerable, and therefore cannot be retriggered until
the output pulse times out. The output pulse width is
determined by the equation:
PW
=
(Rx)(Cx)
where,
PW is in seconds, R is in ohms, and C is in farads.
Limits for R
x
and C
x
are:
External capacitor, C
x
: No limit
External resistors, R
x
: V
CC
=
2.0V, 5k
Ω
Min.
V
CC
>
3.0V, 1 k
Ω
Min
An input protection circuit ensures that 0 to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Ordering Information
Order Number
74VHC221AM
74VHC221ASJ
74VHC221AMTC
Package
Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering code.
©1994 Fairchild Semiconductor Corporation
74VHC221A Rev. 1.2
www.fairchildsemi.com
74VHC221A Dual Non-Retriggerable Monostable Multivibrator
Connection Diagram
Block Diagrams
Logic Symbol
IEEE/IEC
Note A:
Cx, Rx, Dx are external Capacitor, Resistor, and
Diode, respectively.
Note B:
External clamping diode, Dx;
External capacitor is charged to V
CC
level in the wait
state, i.e. when no trigger is applied.
Truth Table
Inputs
A
X
H
L
L
X
H
X
L
L
H
Outputs
CLR
H
H
H
H
L
L
H
H
B
H
L
X
Q
Q
Function
Output Enable
Inhibit
Inhibit
Output Enable
Output Enable
Reset
If the supply voltage is turned off, Cx discharges mainly
through the internal (parasitic) diode. If Cx is sufficiently
large and V
CC
drops rapidly, there will be some possibil-
ity of damaging the IC through in rush current or latch-
up. If the capacitance of the supply voltage filter is large
enough and V
CC
drops slowly, the in rush current is
automatically limited and damage to the IC is avoided.
The maximum value of forward current through the para-
sitic diode is ±20 mA. In the case of a large Cx, the limit
of fall time of the supply voltage is determined as follows:
t
f
≥
(V
CC
– 0.7) Cx / 20mA
(t
f
is the time between the supply voltage turn off and the
supply voltage reaching 0.4 V
CC
)
In the event a system does not satisfy the above condi-
tion, an external clamping diode (Dx) is needed to
protect the IC from rush current.
www.fairchildsemi.com
2
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
=
HIGH-to-LOW Transition
=
LOW-to-HIGH Transition
X = Don’t Care
©1994 Fairchild Semiconductor Corporation
74VHC221A Rev. 1.2
74VHC221A Dual Non-Retriggerable Monostable Multivibrator
System Diagram
Timing Chart
©1994 Fairchild Semiconductor Corporation
74VHC221A Rev. 1.2
www.fairchildsemi.com
3
74VHC221A Dual Non-Retriggerable Monostable Multivibrator
Functional Description
1. Stand-by State
The external capacitor (Cx) is fully charged to V
CC
in
the Stand-by State. That means, before triggering,
the Q
P
and Q
N
transistors which are connected to the
Rx/Cx node are in the off state. Two comparators that
relate to the timing of the output pulse, and two refer-
ence voltage supplies turn off. The total supply cur-
rent is only leakage current.
2. Trigger Operation
Trigger operation is effective in any of the following
three cases. First, the condition where the A input is
LOW, and B input has a rising signal; second, where
the B input is HIGH, and the A input has a falling sig-
nal; and third, where the A input is LOW and the B
input is HIGH, and the CLR input has a rising signal.
After a trigger becomes effective, comparators C1
and C2 start operating, and Q
N
is turned on. The
external capacitor discharges through Q
N
. The volt-
age level at the Rx/Cx node drops. If the Rx/Cx volt-
age level falls to the internal reference voltage V
ref
L,
the output of C1 becomes LOW. The flip-flop is then
reset and Q
N
turns off. At that moment C1 stops but
C2 continues operating.
After Q
N
turns off, the voltage at the Rx/Cx node
starts rising at a rate determined by the time constant
of external capacitor Cx and resistor Rx.
Upon triggering, output Q becomes HIGH, following
some delay time of the internal F/F and gates. It stays
HIGH even if the voltage of Rx/Cx changes from fall-
ing to rising. When Rx/Cx reaches the internal refer-
ence voltage V
ref
H, the output of C2 becomes LOW,
the output Q goes LOW and C2 stops its operation.
That means, after triggering, when the voltage level
of the Rx/Cx node reaches V
ref
H, the IC returns to its
MONOSTABLE state.
With large values of Cx and Rx, and ignoring the dis-
charge time of the capacitor and internal delays of
the IC, the width of the output pulse, t
W
(OUT), is as
follows:
t
W
(OUT)
=
1.0 Cx Rx
3. Reset Operation
In normal operation, the CLR input is held HIGH. If
CLR is LOW, a trigger has no affect because the Q
output is held LOW and the trigger control F/F is
reset. Also, Q
p
turns on and Cx is charged rapidly to
V
CC
.
This means if CLR is set LOW, the IC goes into a wait
state.
©1994 Fairchild Semiconductor Corporation
74VHC221A Rev. 1.2
www.fairchildsemi.com
4
74VHC221A Dual Non-Retriggerable Monostable Multivibrator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
DC V
CC
/ GND Current
Storage Temperature
Parameter
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to V
CC
+ 0.5V
–20mA
±20mA
±25mA
±50mA
–65°C to +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
T
OPR
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Parameter
Rating
2.0V to +5.5V
0V to +5.5V
0V to V
CC
–40°C to +85°C
0ns/V
∼
100ns/V
0ns/V
∼
20ns/V
No Limitation
(2)
F
>5kΩ
(2)
(V
CC
=
2.0V)
>
1k
Ω
(2)
(V
CC
>
3.0V)
Input Rise and Fall Time (CLR only)
V
CC
=
3.3V ± 0.3V
V
CC
=
5.0V ± 0.5V
External Capacitor, Cx
External Resistor, Rx
Notes:
1. Unused inputs must be held HIGH or LOW. They may not float.
2. The maximum allowable values of Cx and Rx are a function of the leakage of capacitor Cx, the leakage of the device,
and leakage due to board layout and surface resistance.
Susceptibility to externally induced noise signals may occur for Rx
>
1 M
Ω
.
©1994 Fairchild Semiconductor Corporation
74VHC221A Rev. 1.2
www.fairchildsemi.com
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
